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| author | Thierry Reding <treding@nvidia.com> | 2020-06-11 20:02:42 +0200 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2020-06-25 09:29:46 +0200 |
| commit | f3de06b4fa7cbdeece84003d74f650abc64729aa (patch) | |
| tree | faf87e83c2dda4c6cc371c7a7a1e5219edf2e77d | |
| parent | ARM: tegra: The Tegra30 DC is not backwards-compatible (diff) | |
| download | linux-f3de06b4fa7cbdeece84003d74f650abc64729aa.tar.xz linux-f3de06b4fa7cbdeece84003d74f650abc64729aa.zip | |
ARM: tegra: The Tegra30 SDHCI is not backwards-compatible
The SDHCI on Tegra30 is in fact not backwards-compatible with the
instantiation found on earlier SoCs. Drop the misleading compatible
string.
Signed-off-by: Thierry Reding <treding@nvidia.com>
| -rw-r--r-- | arch/arm/boot/dts/tegra30.dtsi | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi index 8930255a5ff6..325b593f394e 100644 --- a/arch/arm/boot/dts/tegra30.dtsi +++ b/arch/arm/boot/dts/tegra30.dtsi @@ -856,7 +856,7 @@ }; mmc@78000000 { - compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci"; + compatible = "nvidia,tegra30-sdhci"; reg = <0x78000000 0x200>; interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA30_CLK_SDMMC1>; @@ -867,7 +867,7 @@ }; mmc@78000200 { - compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci"; + compatible = "nvidia,tegra30-sdhci"; reg = <0x78000200 0x200>; interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA30_CLK_SDMMC2>; @@ -878,7 +878,7 @@ }; mmc@78000400 { - compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci"; + compatible = "nvidia,tegra30-sdhci"; reg = <0x78000400 0x200>; interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA30_CLK_SDMMC3>; @@ -889,7 +889,7 @@ }; mmc@78000600 { - compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci"; + compatible = "nvidia,tegra30-sdhci"; reg = <0x78000600 0x200>; interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA30_CLK_SDMMC4>; |