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authorDmitry Torokhov <dmitry.torokhov@gmail.com>2020-01-10 23:56:04 +0100
committerDmitry Torokhov <dmitry.torokhov@gmail.com>2020-01-10 23:56:04 +0100
commit1bdd3e05a0a3b4a97ea88bc46fef8fb265c8b94c (patch)
tree2244894a9ea0c941a8f32e5f3d196b4ea0eae24b /Documentation/devicetree/bindings/pci/layerscape-pci.txt
parentInput: edt-ft5x06 - use pm core to enable/disable the wake irq (diff)
parentLinux 5.5-rc5 (diff)
downloadlinux-1bdd3e05a0a3b4a97ea88bc46fef8fb265c8b94c.tar.xz
linux-1bdd3e05a0a3b4a97ea88bc46fef8fb265c8b94c.zip
Merge tag 'v5.5-rc5' into next
Sync up with mainline to get SPI "delay" API changes.
Diffstat (limited to 'Documentation/devicetree/bindings/pci/layerscape-pci.txt')
-rw-r--r--Documentation/devicetree/bindings/pci/layerscape-pci.txt1
1 files changed, 1 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/pci/layerscape-pci.txt b/Documentation/devicetree/bindings/pci/layerscape-pci.txt
index e20ceaab9b38..99a386ea691c 100644
--- a/Documentation/devicetree/bindings/pci/layerscape-pci.txt
+++ b/Documentation/devicetree/bindings/pci/layerscape-pci.txt
@@ -21,6 +21,7 @@ Required properties:
"fsl,ls1046a-pcie"
"fsl,ls1043a-pcie"
"fsl,ls1012a-pcie"
+ "fsl,ls1028a-pcie"
EP mode:
"fsl,ls1046a-pcie-ep", "fsl,ls-pcie-ep"
- reg: base addresses and lengths of the PCIe controller register blocks.