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authorNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>2015-02-02 06:09:58 +0100
committerBjorn Helgaas <bhelgaas@google.com>2015-02-24 07:23:32 +0100
commit2ea2a2734cd850d8d270022e9aaabc02a931c172 (patch)
tree66c363e5d92a15716898762a3f9e33be86a686cf /Kconfig
parentPCI: rcar: Fix position of MSI enable bit (diff)
downloadlinux-2ea2a2734cd850d8d270022e9aaabc02a931c172.tar.xz
linux-2ea2a2734cd850d8d270022e9aaabc02a931c172.zip
PCI: rcar: Write zeroes to reserved PCIEPARL bits
The lower 7 bits of PCIEPARL are reserved. When we write to this register, these bits must be 0. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Phil Edworthy <phil.edworthy@renesas.com> Acked-by: Simon Horman <horms+renesas@verge.net.au>
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