diff options
| author | Michael Turquette <mturquette@linaro.org> | 2014-12-15 22:30:05 +0100 |
|---|---|---|
| committer | Michael Turquette <mturquette@linaro.org> | 2014-12-16 02:05:07 +0100 |
| commit | b1924c2ec1db98278100010ef87b54406d5ce612 (patch) | |
| tree | e8cab2230cdf0e85920075bf2489b04030d4a78e /arch/arm/mach-omap2/cclock3xxx_data.c | |
| parent | clk: Really fix deadlock with mmap_sem (diff) | |
| parent | ARM: OMAP2+: hwmod: drop unnecessary list initialization (diff) | |
| download | linux-b1924c2ec1db98278100010ef87b54406d5ce612.tar.xz linux-b1924c2ec1db98278100010ef87b54406d5ce612.zip | |
Merge tag 'for-v3.19/omap-a' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into tmp
Some OMAP clock/hwmod patches for v3.19.
Most of the patches are clock-related. The DPLL implementation is
changed to better align to the common clock framework.
There is also a patch that removes a few lines from the hwmod code -
this patch should have no functional effect.
Basic build, boot, and PM test logs for these patches can be found here:
http://www.pwsan.com/omap/testlogs/omap-a-for-v3.19/20141113094101/
Diffstat (limited to 'arch/arm/mach-omap2/cclock3xxx_data.c')
| -rw-r--r-- | arch/arm/mach-omap2/cclock3xxx_data.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/cclock3xxx_data.c b/arch/arm/mach-omap2/cclock3xxx_data.c index eb8c75ec3b1a..5c5ebb4db5f7 100644 --- a/arch/arm/mach-omap2/cclock3xxx_data.c +++ b/arch/arm/mach-omap2/cclock3xxx_data.c @@ -257,6 +257,9 @@ static const struct clk_ops dpll1_ck_ops = { .get_parent = &omap2_init_dpll_parent, .recalc_rate = &omap3_dpll_recalc, .set_rate = &omap3_noncore_dpll_set_rate, + .set_parent = &omap3_noncore_dpll_set_parent, + .set_rate_and_parent = &omap3_noncore_dpll_set_rate_and_parent, + .determine_rate = &omap3_noncore_dpll_determine_rate, .round_rate = &omap2_dpll_round_rate, }; @@ -367,6 +370,9 @@ static const struct clk_ops dpll4_ck_ops = { .get_parent = &omap2_init_dpll_parent, .recalc_rate = &omap3_dpll_recalc, .set_rate = &omap3_dpll4_set_rate, + .set_parent = &omap3_noncore_dpll_set_parent, + .set_rate_and_parent = &omap3_dpll4_set_rate_and_parent, + .determine_rate = &omap3_noncore_dpll_determine_rate, .round_rate = &omap2_dpll_round_rate, }; |