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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2011-08-08 08:22:41 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2011-08-08 08:22:41 +0200 |
| commit | 1a43f2012455a977397deffe35912fd3f3ce17b9 (patch) | |
| tree | 5189f337df44e7a495fbd097cd476b0380babd8c /arch/arm/mm/tlb-v6.S | |
| parent | ARM: iMX5: Don't enable DPLL if it already enabled (diff) | |
| parent | Linux 3.1-rc1 (diff) | |
| download | linux-1a43f2012455a977397deffe35912fd3f3ce17b9.tar.xz linux-1a43f2012455a977397deffe35912fd3f3ce17b9.zip | |
Merge commit 'v3.1-rc1' into imx-fixes
Diffstat (limited to 'arch/arm/mm/tlb-v6.S')
| -rw-r--r-- | arch/arm/mm/tlb-v6.S | 12 |
1 files changed, 3 insertions, 9 deletions
diff --git a/arch/arm/mm/tlb-v6.S b/arch/arm/mm/tlb-v6.S index 73d7d89b04c4..eca07f550a0b 100644 --- a/arch/arm/mm/tlb-v6.S +++ b/arch/arm/mm/tlb-v6.S @@ -54,7 +54,6 @@ ENTRY(v6wbi_flush_user_tlb_range) add r0, r0, #PAGE_SZ cmp r0, r1 blo 1b - mcr p15, 0, ip, c7, c5, 6 @ flush BTAC/BTB mcr p15, 0, ip, c7, c10, 4 @ data synchronization barrier mov pc, lr @@ -83,16 +82,11 @@ ENTRY(v6wbi_flush_kern_tlb_range) add r0, r0, #PAGE_SZ cmp r0, r1 blo 1b - mcr p15, 0, r2, c7, c5, 6 @ flush BTAC/BTB mcr p15, 0, r2, c7, c10, 4 @ data synchronization barrier - mcr p15, 0, r2, c7, c5, 4 @ prefetch flush + mcr p15, 0, r2, c7, c5, 4 @ prefetch flush (isb) mov pc, lr __INIT - .type v6wbi_tlb_fns, #object -ENTRY(v6wbi_tlb_fns) - .long v6wbi_flush_user_tlb_range - .long v6wbi_flush_kern_tlb_range - .long v6wbi_tlb_flags - .size v6wbi_tlb_fns, . - v6wbi_tlb_fns + /* define struct cpu_tlb_fns (see <asm/tlbflush.h> and proc-macros.S) */ + define_tlb_functions v6wbi, v6wbi_tlb_flags |