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| author | Shanker Donthineni <shankerd@codeaurora.org> | 2018-04-10 12:36:42 +0200 |
|---|---|---|
| committer | Will Deacon <will.deacon@arm.com> | 2018-04-11 19:49:30 +0200 |
| commit | 4bc352ffb39e4eec253e70f8c076f2f48a6c1926 (patch) | |
| tree | dc7de7d28f606e235d333a9a154a99a86ba072e1 /arch/arm64/kernel/bpi.S | |
| parent | Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm (diff) | |
| download | linux-4bc352ffb39e4eec253e70f8c076f2f48a6c1926.tar.xz linux-4bc352ffb39e4eec253e70f8c076f2f48a6c1926.zip | |
arm64: KVM: Use SMCCC_ARCH_WORKAROUND_1 for Falkor BP hardening
The function SMCCC_ARCH_WORKAROUND_1 was introduced as part of SMC
V1.1 Calling Convention to mitigate CVE-2017-5715. This patch uses
the standard call SMCCC_ARCH_WORKAROUND_1 for Falkor chips instead
of Silicon provider service ID 0xC2001700.
Cc: <stable@vger.kernel.org> # 4.14+
Signed-off-by: Shanker Donthineni <shankerd@codeaurora.org>
[maz: reworked errata framework integration]
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm64/kernel/bpi.S')
| -rw-r--r-- | arch/arm64/kernel/bpi.S | 8 |
1 files changed, 0 insertions, 8 deletions
diff --git a/arch/arm64/kernel/bpi.S b/arch/arm64/kernel/bpi.S index bb0b67722e86..9404f6aecda7 100644 --- a/arch/arm64/kernel/bpi.S +++ b/arch/arm64/kernel/bpi.S @@ -74,14 +74,6 @@ ENTRY(__bp_harden_hyp_vecs_end) .popsection -ENTRY(__qcom_hyp_sanitize_link_stack_start) - stp x29, x30, [sp, #-16]! - .rept 16 - bl . + 4 - .endr - ldp x29, x30, [sp], #16 -ENTRY(__qcom_hyp_sanitize_link_stack_end) - .macro smccc_workaround_1 inst sub sp, sp, #(8 * 4) stp x2, x3, [sp, #(8 * 0)] |