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author | Marc Zyngier <maz@kernel.org> | 2023-04-08 18:04:25 +0200 |
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committer | Marc Zyngier <maz@kernel.org> | 2023-04-14 09:23:29 +0200 |
commit | 8442d65373c6316876208c1ad27729e9682fa3cf (patch) | |
tree | 8879a4754ec4060ea61456be929518d2bfb86427 /arch/arm64/kvm | |
parent | KVM: arm64: nvhe: Synchronise with page table walker on TLBI (diff) | |
download | linux-8442d65373c6316876208c1ad27729e9682fa3cf.tar.xz linux-8442d65373c6316876208c1ad27729e9682fa3cf.zip |
KVM: arm64: pkvm: Document the side effects of kvm_flush_dcache_to_poc()
We rely on the presence of a DSB at the end of kvm_flush_dcache_to_poc()
that, on top of ensuring completion of the cache clean, also covers
the speculative page table walk started from EL1.
Document this dependency.
Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Oliver Upton <oliver.upton@linux.dev>
Diffstat (limited to 'arch/arm64/kvm')
-rw-r--r-- | arch/arm64/kvm/hyp/nvhe/mem_protect.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm64/kvm/hyp/nvhe/mem_protect.c b/arch/arm64/kvm/hyp/nvhe/mem_protect.c index 552653fa18be..2e9ec4a2a4a3 100644 --- a/arch/arm64/kvm/hyp/nvhe/mem_protect.c +++ b/arch/arm64/kvm/hyp/nvhe/mem_protect.c @@ -297,6 +297,13 @@ int __pkvm_prot_finalize(void) params->vttbr = kvm_get_vttbr(mmu); params->vtcr = host_mmu.arch.vtcr; params->hcr_el2 |= HCR_VM; + + /* + * The CMO below not only cleans the updated params to the + * PoC, but also provides the DSB that ensures ongoing + * page-table walks that have started before we trapped to EL2 + * have completed. + */ kvm_flush_dcache_to_poc(params, sizeof(*params)); write_sysreg(params->hcr_el2, hcr_el2); |