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authorGreg Kroah-Hartman <gregkh@linuxfoundation.org>2022-09-05 07:53:56 +0200
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2022-09-05 07:53:56 +0200
commit50e177c5bfd9abc3828cb57e14e6169170f6764a (patch)
tree180aafa376fb7a0a89c7d6812f640f8c46758bd5 /arch/x86/events/intel/lbr.c
parentmisc: microchip: pci1xxxx: Add power management functions - suspend & resume ... (diff)
parentLinux 6.0-rc4 (diff)
downloadlinux-50e177c5bfd9abc3828cb57e14e6169170f6764a.tar.xz
linux-50e177c5bfd9abc3828cb57e14e6169170f6764a.zip
Merge 6.0-rc4 into char-misc-next
We need the char-misc fixes in here as well. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'arch/x86/events/intel/lbr.c')
-rw-r--r--arch/x86/events/intel/lbr.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/x86/events/intel/lbr.c b/arch/x86/events/intel/lbr.c
index 4f70fb6c2c1e..47fca6a7a8bc 100644
--- a/arch/x86/events/intel/lbr.c
+++ b/arch/x86/events/intel/lbr.c
@@ -1097,6 +1097,14 @@ static int intel_pmu_setup_hw_lbr_filter(struct perf_event *event)
if (static_cpu_has(X86_FEATURE_ARCH_LBR)) {
reg->config = mask;
+
+ /*
+ * The Arch LBR HW can retrieve the common branch types
+ * from the LBR_INFO. It doesn't require the high overhead
+ * SW disassemble.
+ * Enable the branch type by default for the Arch LBR.
+ */
+ reg->reg |= X86_BR_TYPE_SAVE;
return 0;
}