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author | Max Filippov <jcmvbkbc@gmail.com> | 2019-05-13 05:28:25 +0200 |
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committer | Max Filippov <jcmvbkbc@gmail.com> | 2019-07-08 19:04:48 +0200 |
commit | d6d5f19e21d98c0607ff029e4e2e508d4cdd1d5a (patch) | |
tree | 1780d36ac99c16f8ed506948a020017e84a89a9f /arch/xtensa/lib/memset.S | |
parent | xtensa: One function call less in bootmem_init() (diff) | |
download | linux-d6d5f19e21d98c0607ff029e4e2e508d4cdd1d5a.tar.xz linux-d6d5f19e21d98c0607ff029e4e2e508d4cdd1d5a.zip |
xtensa: abstract 'entry' and 'retw' in assembly code
Provide abi_entry, abi_entry_default, abi_ret and abi_ret_default macros
that allocate aligned stack frame in windowed and call0 ABIs.
Provide XTENSA_SPILL_STACK_RESERVE macro that specifies required stack
frame size when register spilling is involved.
Replace all uses of 'entry' and 'retw' with the above macros.
This makes most of the xtensa assembly code ready for XEA3 and call0 ABI.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'arch/xtensa/lib/memset.S')
-rw-r--r-- | arch/xtensa/lib/memset.S | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/xtensa/lib/memset.S b/arch/xtensa/lib/memset.S index 8632eacbdc80..59b1524fd601 100644 --- a/arch/xtensa/lib/memset.S +++ b/arch/xtensa/lib/memset.S @@ -34,7 +34,7 @@ ENTRY(__memset) WEAK(memset) - entry sp, 16 # minimal stack frame + abi_entry_default # a2/ dst, a3/ c, a4/ length extui a3, a3, 0, 8 # mask to just 8 bits slli a7, a3, 8 # duplicate character in all bytes of word @@ -48,7 +48,7 @@ WEAK(memset) srli a7, a4, 4 # number of loop iterations with 16B # per iteration bnez a4, .Laligned - retw + abi_ret_default /* * Destination is word-aligned. @@ -95,7 +95,7 @@ EX(10f) s16i a3, a5, 0 EX(10f) s8i a3, a5, 0 .L5: .Lret1: - retw + abi_ret_default /* * Destination is unaligned @@ -139,7 +139,7 @@ EX(10f) s8i a3, a5, 0 blt a5, a6, .Lbyteloop #endif /* !XCHAL_HAVE_LOOPS */ .Lbytesetdone: - retw + abi_ret_default ENDPROC(__memset) @@ -150,4 +150,4 @@ ENDPROC(__memset) 10: movi a2, 0 - retw + abi_ret_default |