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| author | Ondrej Jirman <megous@megous.com> | 2019-03-28 12:31:58 +0100 |
|---|---|---|
| committer | Maxime Ripard <maxime.ripard@bootlin.com> | 2019-04-01 10:19:50 +0200 |
| commit | 261e1a6e4ae5f5bfe8ad8d44580b880da99b81eb (patch) | |
| tree | 45211bea9613a0b1b9403cd5e843396fb140d68c /arch | |
| parent | ARM: dts: sun8i: a83t: Add nodes for UART2-UART4 (diff) | |
| download | linux-261e1a6e4ae5f5bfe8ad8d44580b880da99b81eb.tar.xz linux-261e1a6e4ae5f5bfe8ad8d44580b880da99b81eb.zip | |
ARM: dts: sun8i: a83t: Add missing cooling device properties for CPUs
Enable to use CPUs as cooling device in the future, by adding
"#cooling-cells" to each CPU node. This property should be present for
all the CPUs of a cluster. If these are present only for a subset of
CPUs of a cluster then things will start falling apart as soon as the
CPUs are brought online in a different order. For example, this will
happen because the operating system looks for such properties in the CPU
node it is trying to bring up, so that it can register a cooling device.
Signed-off-by: Ondrej Jirman <megous@megous.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/boot/dts/sun8i-a83t.dtsi | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi index e5c39eef1c29..da25d50ea5d4 100644 --- a/arch/arm/boot/dts/sun8i-a83t.dtsi +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi @@ -69,6 +69,7 @@ cci-control-port = <&cci_control0>; enable-method = "allwinner,sun8i-a83t-smp"; reg = <0>; + #cooling-cells = <2>; }; cpu@1 { @@ -78,6 +79,7 @@ cci-control-port = <&cci_control0>; enable-method = "allwinner,sun8i-a83t-smp"; reg = <1>; + #cooling-cells = <2>; }; cpu@2 { @@ -87,6 +89,7 @@ cci-control-port = <&cci_control0>; enable-method = "allwinner,sun8i-a83t-smp"; reg = <2>; + #cooling-cells = <2>; }; cpu@3 { @@ -96,6 +99,7 @@ cci-control-port = <&cci_control0>; enable-method = "allwinner,sun8i-a83t-smp"; reg = <3>; + #cooling-cells = <2>; }; cpu100: cpu@100 { @@ -107,6 +111,7 @@ cci-control-port = <&cci_control1>; enable-method = "allwinner,sun8i-a83t-smp"; reg = <0x100>; + #cooling-cells = <2>; }; cpu@101 { @@ -116,6 +121,7 @@ cci-control-port = <&cci_control1>; enable-method = "allwinner,sun8i-a83t-smp"; reg = <0x101>; + #cooling-cells = <2>; }; cpu@102 { @@ -125,6 +131,7 @@ cci-control-port = <&cci_control1>; enable-method = "allwinner,sun8i-a83t-smp"; reg = <0x102>; + #cooling-cells = <2>; }; cpu@103 { @@ -134,6 +141,7 @@ cci-control-port = <&cci_control1>; enable-method = "allwinner,sun8i-a83t-smp"; reg = <0x103>; + #cooling-cells = <2>; }; }; |