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author | Jonathan Marek <jonathan@marek.ca> | 2020-07-09 15:52:33 +0200 |
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committer | Stephen Boyd <sboyd@kernel.org> | 2020-07-24 10:51:02 +0200 |
commit | c8b9002f44e4a1d2771b2f59f6de900864b1f9d7 (patch) | |
tree | 82bfc0a5bbc92db144b9512346e7db73d2e588d8 /drivers/clk/qcom/reset.c | |
parent | clk: qcom: gcc: fix sm8150 GPU and NPU clocks (diff) | |
download | linux-c8b9002f44e4a1d2771b2f59f6de900864b1f9d7.tar.xz linux-c8b9002f44e4a1d2771b2f59f6de900864b1f9d7.zip |
clk: qcom: clk-alpha-pll: remove unused/incorrect PLL_CAL_VAL
0x44 isn't a register offset, it is the value that goes into CAL_L_VAL.
Fixes: 548a909597d5 ("clk: qcom: clk-alpha-pll: Add support for Trion PLLs")
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20200709135251.643-3-jonathan@marek.ca
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/qcom/reset.c')
0 files changed, 0 insertions, 0 deletions