diff options
| author | Ajit Kumar Pandey <AjitKumar.Pandey@amd.com> | 2021-12-12 19:05:27 +0100 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2022-01-07 02:57:53 +0100 |
| commit | 1fdaaa13b44fdcbe3b6bed9cf5b67f9efac50610 (patch) | |
| tree | 4d965b61b12c4bdd3415d78751c7d48179a8cd72 /drivers/clk/x86/clk-fch.c | |
| parent | clk: x86: Use dynamic con_id string during clk registration (diff) | |
| download | linux-1fdaaa13b44fdcbe3b6bed9cf5b67f9efac50610.tar.xz linux-1fdaaa13b44fdcbe3b6bed9cf5b67f9efac50610.zip | |
clk: x86: Fix clk_gate_flags for RV_CLK_GATE
In newer SoC we have to clear bit for disabling 48MHz oscillator
clock gate. Remove CLK_GATE_SET_TO_DISABLE flag for proper enable
and disable of 48MHz clock.
Signed-off-by: Ajit Kumar Pandey <AjitKumar.Pandey@amd.com>
Reviewed-by: Mario Limonciello <Mario.Limonciello@amd.com>
Link: https://lore.kernel.org/r/20211212180527.1641362-6-AjitKumar.Pandey@amd.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/x86/clk-fch.c')
| -rw-r--r-- | drivers/clk/x86/clk-fch.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/x86/clk-fch.c b/drivers/clk/x86/clk-fch.c index d41d519b9c2b..fdc060e75839 100644 --- a/drivers/clk/x86/clk-fch.c +++ b/drivers/clk/x86/clk-fch.c @@ -82,7 +82,7 @@ static int fch_clk_probe(struct platform_device *pdev) hws[CLK_GATE_FIXED] = clk_hw_register_gate(NULL, "oscout1", "clk48MHz", 0, fch_data->base + MISCCLKCNTL1, - OSCCLKENB, CLK_GATE_SET_TO_DISABLE, NULL); + OSCCLKENB, 0, NULL); devm_clk_hw_register_clkdev(&pdev->dev, hws[CLK_GATE_FIXED], fch_data->name, NULL); |