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author | Dave Jiang <dave.jiang@intel.com> | 2013-03-26 23:43:09 +0100 |
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committer | Vinod Koul <vinod.koul@intel.com> | 2013-04-15 06:21:20 +0200 |
commit | 3f09ede4237fe4691ac687c6c43cb4c1a530777b (patch) | |
tree | e04f61ab8bbca7bf434a8f04ea28d4de14fec048 /drivers/dma/ioat/registers.h | |
parent | ioatdma: skip legacy reset bits since v3.3 plattform doesn't need it (diff) | |
download | linux-3f09ede4237fe4691ac687c6c43cb4c1a530777b.tar.xz linux-3f09ede4237fe4691ac687c6c43cb4c1a530777b.zip |
ioatdma: Removing PQ val disable for cb3.3
The PQ Val ops work on the newer hardware so we should actually provide support
for it and remove the disabling bits.
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Acked-by: Dan Williams <djbw@fb.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'drivers/dma/ioat/registers.h')
-rw-r--r-- | drivers/dma/ioat/registers.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/dma/ioat/registers.h b/drivers/dma/ioat/registers.h index 1391798542b6..c1ad1946809e 100644 --- a/drivers/dma/ioat/registers.h +++ b/drivers/dma/ioat/registers.h @@ -93,6 +93,8 @@ #define IOAT_CHANCTRL_ERR_COMPLETION_EN 0x0004 #define IOAT_CHANCTRL_INT_REARM 0x0001 #define IOAT_CHANCTRL_RUN (IOAT_CHANCTRL_INT_REARM |\ + IOAT_CHANCTRL_ERR_INT_EN |\ + IOAT_CHANCTRL_ERR_COMPLETION_EN |\ IOAT_CHANCTRL_ANY_ERR_ABORT_EN) #define IOAT_DMA_COMP_OFFSET 0x02 /* 16-bit DMA channel compatibility */ |