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| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2024-06-25 15:58:52 +0200 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2024-08-29 13:53:48 +0200 |
| commit | 81a1c37c8b52eff636e77a794d0f0620c3a40af0 (patch) | |
| tree | 3b8580a4a9205c43dce8a21f12a000af9dc4b7f0 /drivers/gpu/drm/i915/i915_reg.h | |
| parent | drm/i915: Fix readout degamma_lut mismatch on ilk/snb (diff) | |
| download | linux-81a1c37c8b52eff636e77a794d0f0620c3a40af0.tar.xz linux-81a1c37c8b52eff636e77a794d0f0620c3a40af0.zip | |
drm/i915/dsb: Hook up DSB error interrupts
Enable all DSB error/fault interrupts so that we can see if
anything goes terribly wrong.
v2: Pass intel_display to DISPLAY_VER() (Jani)
Drop extra '/' from drm_err() for consistency
v3: Reorder the irq handler a bit
Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240625135852.13431-1-ville.syrjala@linux.intel.com
Reviewed-by: Animesh Manna <animesh.manna@intel.com>
Diffstat (limited to '')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 569b461022c5..41f4350a7c6c 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -2516,6 +2516,10 @@ #define GEN11_PIPE_PLANE7_FLIP_DONE REG_BIT(18) /* icl/tgl */ #define GEN11_PIPE_PLANE6_FLIP_DONE REG_BIT(17) /* icl/tgl */ #define GEN11_PIPE_PLANE5_FLIP_DONE REG_BIT(16) /* icl+ */ +#define GEN12_DSB_2_INT REG_BIT(15) /* tgl+ */ +#define GEN12_DSB_1_INT REG_BIT(14) /* tgl+ */ +#define GEN12_DSB_0_INT REG_BIT(13) /* tgl+ */ +#define GEN12_DSB_INT(dsb_id) REG_BIT(13 + (dsb_id)) #define GEN9_PIPE_CURSOR_FAULT REG_BIT(11) /* skl+ */ #define GEN9_PIPE_PLANE4_FAULT REG_BIT(10) /* skl+ */ #define GEN8_PIPE_CURSOR_FAULT REG_BIT(10) /* bdw */ |