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author | Chris Wilson <chris@chris-wilson.co.uk> | 2018-08-02 12:06:28 +0200 |
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committer | Chris Wilson <chris@chris-wilson.co.uk> | 2018-08-02 19:24:05 +0200 |
commit | 0d55babc8392754352f1058866dd4182ae587d11 (patch) | |
tree | c74550145e5fddadb00d2d502fa9fb8e8637f585 /drivers/gpu/drm/i915/intel_pm.c | |
parent | drm/i915/execlists: Terminate the context image with BB_END (diff) | |
download | linux-0d55babc8392754352f1058866dd4182ae587d11.tar.xz linux-0d55babc8392754352f1058866dd4182ae587d11.zip |
drm/i915: Drop stray clearing of rps->last_adj
We used to reset last_adj to 0 on crossing a power domain boundary, to
slow down our rate of change. However, commit 60548c554be2 ("drm/i915:
Interactive RPS mode") accidentally caused it to be reset on every
frequency update, nerfing the fast response granted by the slow start
algorithm.
Fixes: 60548c554be2 ("drm/i915: Interactive RPS mode")
Testcase: igt/pm_rps/mix-max-config-loaded
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180802100631.31305-1-chris@chris-wilson.co.uk
Diffstat (limited to '')
-rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 2531eb75bdce..f90a3c7f1c40 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -6371,7 +6371,6 @@ static void gen6_set_rps_thresholds(struct drm_i915_private *dev_priv, u8 val) new_power = HIGH_POWER; rps_set_power(dev_priv, new_power); mutex_unlock(&rps->power.mutex); - rps->last_adj = 0; } void intel_rps_mark_interactive(struct drm_i915_private *i915, bool interactive) |