diff options
| author | Len Brown <len.brown@intel.com> | 2008-10-23 05:57:26 +0200 |
|---|---|---|
| committer | Len Brown <len.brown@intel.com> | 2008-10-23 06:11:07 +0200 |
| commit | 057316cc6a5b521b332a1d7ccc871cd60c904c74 (patch) | |
| tree | 4333e608da237c73ff69b10878025cca96dcb4c8 /drivers/net/ibm_newemac/mal.h | |
| parent | panasonic-laptop: fix build (diff) | |
| parent | binfmt_elf_fdpic: Update for cputime changes. (diff) | |
| download | linux-057316cc6a5b521b332a1d7ccc871cd60c904c74.tar.xz linux-057316cc6a5b521b332a1d7ccc871cd60c904c74.zip | |
Merge branch 'linus' into test
Conflicts:
MAINTAINERS
arch/x86/kernel/acpi/boot.c
arch/x86/kernel/acpi/sleep.c
drivers/acpi/Kconfig
drivers/pnp/Makefile
drivers/pnp/quirks.c
Signed-off-by: Len Brown <len.brown@intel.com>
Diffstat (limited to 'drivers/net/ibm_newemac/mal.h')
| -rw-r--r-- | drivers/net/ibm_newemac/mal.h | 38 |
1 files changed, 36 insertions, 2 deletions
diff --git a/drivers/net/ibm_newemac/mal.h b/drivers/net/ibm_newemac/mal.h index eaa7262dc079..2f0a87360844 100644 --- a/drivers/net/ibm_newemac/mal.h +++ b/drivers/net/ibm_newemac/mal.h @@ -102,7 +102,7 @@ /* MAL V1 IER bits */ #define MAL1_IER_NWE 0x00000008 #define MAL1_IER_SOC_EVENTS MAL1_IER_NWE -#define MAL1_IER_EVENTS (MAL1_IER_SOC_EVENTS | MAL_IER_OTE | \ +#define MAL1_IER_EVENTS (MAL1_IER_SOC_EVENTS | MAL_IER_DE | \ MAL_IER_OTE | MAL_IER_OE | MAL_IER_PE) /* MAL V2 IER bits */ @@ -110,7 +110,7 @@ #define MAL2_IER_PRE 0x00000040 #define MAL2_IER_PWE 0x00000020 #define MAL2_IER_SOC_EVENTS (MAL2_IER_PT | MAL2_IER_PRE | MAL2_IER_PWE) -#define MAL2_IER_EVENTS (MAL2_IER_SOC_EVENTS | MAL_IER_OTE | \ +#define MAL2_IER_EVENTS (MAL2_IER_SOC_EVENTS | MAL_IER_DE | \ MAL_IER_OTE | MAL_IER_OE | MAL_IER_PE) @@ -213,6 +213,8 @@ struct mal_instance { struct of_device *ofdev; int index; spinlock_t lock; + + unsigned int features; }; static inline u32 get_mal_dcrn(struct mal_instance *mal, int reg) @@ -225,6 +227,38 @@ static inline void set_mal_dcrn(struct mal_instance *mal, int reg, u32 val) dcr_write(mal->dcr_host, reg, val); } +/* Features of various MAL implementations */ + +/* Set if you have interrupt coalescing and you have to clear the SDR + * register for TXEOB and RXEOB interrupts to work + */ +#define MAL_FTR_CLEAR_ICINTSTAT 0x00000001 + +/* Set if your MAL has SERR, TXDE, and RXDE OR'd into a single UIC + * interrupt + */ +#define MAL_FTR_COMMON_ERR_INT 0x00000002 + +enum { + MAL_FTRS_ALWAYS = 0, + + MAL_FTRS_POSSIBLE = +#ifdef CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT + MAL_FTR_CLEAR_ICINTSTAT | +#endif +#ifdef CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR + MAL_FTR_COMMON_ERR_INT | +#endif + 0, +}; + +static inline int mal_has_feature(struct mal_instance *dev, + unsigned long feature) +{ + return (MAL_FTRS_ALWAYS & feature) || + (MAL_FTRS_POSSIBLE & dev->features & feature); +} + /* Register MAL devices */ int mal_init(void); void mal_exit(void); |