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authorTobias Klauser <tklauser@distanz.ch>2010-05-05 10:35:22 +0200
committerGreg Kroah-Hartman <gregkh@suse.de>2010-05-21 18:34:30 +0200
commit5bcd601049c6b2ad52733d4cd2794bfbaf1b9314 (patch)
tree17be8d880b26e513a1239a7c26b6ba87d8aa7640 /drivers/serial/altera_uart.c
parentserial: timbuart: make sure last byte is sent when port is closed (diff)
downloadlinux-5bcd601049c6b2ad52733d4cd2794bfbaf1b9314.tar.xz
linux-5bcd601049c6b2ad52733d4cd2794bfbaf1b9314.zip
serial: Add driver for the Altera JTAG UART
Add an UART driver for the JTAG UART component available as a SOPC (System on Programmable Chip) component for Altera FPGAs. Signed-off-by: Tobias Klauser <tklauser@distanz.ch> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/serial/altera_uart.c')
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