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authorStephan Olbrich <stephanolbrich@gmx.de>2016-02-14 11:04:29 +0100
committerMark Brown <broonie@kernel.org>2016-02-15 21:45:47 +0100
commite9dd4edcc98593bbcdffc0c4f37545b8fd0ad3ea (patch)
tree69d6cc2f8d528c87b0828401659ad6ec3f751965 /drivers/spi/spi.c
parentspi: bcm2835aux: set up spi-mode before asserting cs-gpio (diff)
downloadlinux-e9dd4edcc98593bbcdffc0c4f37545b8fd0ad3ea.tar.xz
linux-e9dd4edcc98593bbcdffc0c4f37545b8fd0ad3ea.zip
spi: bcm2835aux: fix CPOL/CPHA setting
The auxiliary spi supports only CPHA=0 modes as the first bit is always output to the pin before the first clock cycle. In CPHA=1 modes the first clock edge outputs the second bit hence the slave can never read the first bit. Also the CPHA registers switch between clocking data in/out on rising/falling edge hence depend on the CPOL setting. Signed-off-by: Stephan Olbrich <stephanolbrich@gmx.de> Reviewed-by: Eric Anholt <eric@anholt.net> Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi/spi.c')
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