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author | Ingo Molnar <mingo@elte.hu> | 2008-07-06 14:23:39 +0200 |
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committer | Ingo Molnar <mingo@elte.hu> | 2008-07-06 14:23:39 +0200 |
commit | 68083e05d72d94f347293d8cc0067050ba904bfa (patch) | |
tree | 842e71365bd90866be7add181661a4039d891564 /include/asm-mips/gic.h | |
parent | cpumask: make for_each_cpu_mask a bit smaller (diff) | |
parent | Linux 2.6.26-rc9 (diff) | |
download | linux-68083e05d72d94f347293d8cc0067050ba904bfa.tar.xz linux-68083e05d72d94f347293d8cc0067050ba904bfa.zip |
Merge commit 'v2.6.26-rc9' into cpus4096
Diffstat (limited to 'include/asm-mips/gic.h')
-rw-r--r-- | include/asm-mips/gic.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/include/asm-mips/gic.h b/include/asm-mips/gic.h index 01b2f92dc33d..954807d9d66a 100644 --- a/include/asm-mips/gic.h +++ b/include/asm-mips/gic.h @@ -24,8 +24,8 @@ #define MSK(n) ((1 << (n)) - 1) #define REG32(addr) (*(volatile unsigned int *) (addr)) -#define REG(base, offs) REG32((unsigned int)(base) + offs##_##OFS) -#define REGP(base, phys) REG32((unsigned int)(base) + (phys)) +#define REG(base, offs) REG32((unsigned long)(base) + offs##_##OFS) +#define REGP(base, phys) REG32((unsigned long)(base) + (phys)) /* Accessors */ #define GIC_REG(segment, offset) \ @@ -330,7 +330,7 @@ #define GIC_SH_RMASK_OFS 0x0300 #define GIC_CLR_INTR_MASK(intr, val) \ - GICWRITE(GIC_REG_ADDR(SHARED, GIC_SH_RMASK_OFS + 4 + (((((intr) / 32) ^ 1) - 1) * 4)), ((val) << ((intr) % 32)) + GICWRITE(GIC_REG_ADDR(SHARED, GIC_SH_RMASK_OFS + 4 + (((((intr) / 32) ^ 1) - 1) * 4)), ((val) << ((intr) % 32))) /* Register Map for Local Section */ #define GIC_VPE_CTL_OFS 0x0000 |