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| author | Joseph Lo <josephl@nvidia.com> | 2019-05-29 10:21:34 +0200 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2020-05-12 22:48:41 +0200 |
| commit | a3cba697a2a09e6769996d5265991a3228004d92 (patch) | |
| tree | 44529c3daedf7f001d4f17acd0db5c4d647facad /net/rds | |
| parent | clk: tegra: Add PLLP_UD and PLLMB_UD for Tegra210 (diff) | |
| download | linux-a3cba697a2a09e6769996d5265991a3228004d92.tar.xz linux-a3cba697a2a09e6769996d5265991a3228004d92.zip | |
clk: tegra: Export functions for EMC clock scaling
Export functions to allow accessing the CAR register required by EMC
clock scaling. These functions will be used to access the CAR register
as part of the scaling sequence.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'net/rds')
0 files changed, 0 insertions, 0 deletions