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Diffstat (limited to 'arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi')
-rw-r--r--arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi16
1 files changed, 13 insertions, 3 deletions
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
index 3731ffb4a5c9..b02142b2b460 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
@@ -21,16 +21,19 @@
k3_pds: power-controller {
compatible = "ti,sci-pm-domain";
#power-domain-cells = <2>;
+ bootph-all;
};
k3_clks: clock-controller {
compatible = "ti,k2g-sci-clk";
#clock-cells = <2>;
+ bootph-all;
};
k3_reset: reset-controller {
compatible = "ti,sci-reset";
#reset-cells = <2>;
+ bootph-all;
};
};
@@ -61,6 +64,7 @@
chipid: chipid@14 {
compatible = "ti,am654-chipid";
reg = <0x14 0x4>;
+ bootph-all;
};
};
@@ -112,6 +116,7 @@
assigned-clocks = <&k3_clks 35 1>;
assigned-clock-parents = <&k3_clks 35 2>;
power-domains = <&k3_pds 35 TI_SCI_PD_EXCLUSIVE>;
+ bootph-pre-ram;
ti,timer-pwm;
/* Non-MPU Firmware usage */
status = "reserved";
@@ -362,6 +367,7 @@
reg = <0x00 0x47000004 0x00 0x4>;
#mux-control-cells = <1>;
mux-reg-masks = <0x0 0x2>; /* HBMC select */
+ bootph-all;
};
hbmc: hyperbus@47034000 {
@@ -470,6 +476,7 @@
<0x0 0x2a500000 0x0 0x40000>,
<0x0 0x28440000 0x0 0x40000>;
reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg";
+ bootph-all;
ti,num-rings = <286>;
ti,sci-rm-range-gp-rings = <0x1>; /* GP ring range */
ti,sci = <&dmsc>;
@@ -489,6 +496,7 @@
"tchan", "rchan", "rflow";
msi-parent = <&main_udmass_inta>;
#dma-cells = <1>;
+ bootph-all;
ti,sci = <&dmsc>;
ti,sci-dev-id = <236>;
@@ -509,6 +517,7 @@
reg = <0x0 0x2a480000 0x0 0x80000>,
<0x0 0x2a380000 0x0 0x80000>,
<0x0 0x2a400000 0x0 0x80000>;
+ bootph-pre-ram;
/*
* Marked Disabled:
* Node is incomplete as it is meant for bootloaders and
@@ -654,7 +663,7 @@
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 274 TI_SCI_PD_EXCLUSIVE>;
- clocks = <&k3_clks 274 0>;
+ clocks = <&k3_clks 274 1>;
status = "disabled";
};
@@ -665,7 +674,7 @@
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 275 TI_SCI_PD_EXCLUSIVE>;
- clocks = <&k3_clks 275 0>;
+ clocks = <&k3_clks 275 1>;
status = "disabled";
};
@@ -676,7 +685,7 @@
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 276 TI_SCI_PD_EXCLUSIVE>;
- clocks = <&k3_clks 276 0>;
+ clocks = <&k3_clks 276 1>;
status = "disabled";
};
@@ -687,6 +696,7 @@
<0x00 0x43000300 0x00 0x10>;
power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>;
#thermal-sensor-cells = <1>;
+ bootph-pre-ram;
};
mcu_esm: esm@40800000 {