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* Merge tag 'dmaengine-6.11-rc1' of ↵Linus Torvalds2024-07-2410-158/+421
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine Pull dmaengine updates from Vinod Koul: "New support: - New dmaengine_prep_peripheral_dma_vec() to support transfers using dma vectors and documentation and user in AXI dma - STMicro STM32 DMA3 support and new capabilities of cyclic dma Updates: - Yaml conversion for Freescale imx dma and qdma bindings, sprd sc9860 dma binding - Altera msgdma updates for descriptor management" * tag 'dmaengine-6.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine: (35 commits) dt-bindings: fsl-qdma: fix interrupts 'if' check logic dt-bindings: dma: sprd,sc9860-dma: convert to YAML dmaengine: fsl-dpaa2-qdma: add missing MODULE_DESCRIPTION() macro dmaengine: ti: add missing MODULE_DESCRIPTION() macros dmaengine: ti: cppi41: add missing MODULE_DESCRIPTION() macro dmaengine: virt-dma: add missing MODULE_DESCRIPTION() macro dmaengine: ti: k3-udma: Fix BCHAN count with UHC and HC channels dmaengine: sh: rz-dmac: Fix lockdep assert warning dmaengine: qcom: gpi: clean up the IRQ disable/enable in gpi_reset_chan() dmaengine: fsl-edma: change the memory access from local into remote mode in i.MX 8QM dmaengine: qcom: gpi: remove unused struct 'reg_info' dmaengine: moxart-dma: remove unused struct 'moxart_filter_data' dt-bindings: fsl-qdma: Convert to yaml format dmaengine: fsl-edma: remove redundant "idle" field from fsl_chan dmaengine: fsl-edma: request per-channel IRQ only when channel is allocated dmaengine: stm32-dma3: defer channel registration to specify channel name dmaengine: add channel device name to channel registration dmaengine: stm32-dma3: improve residue granularity dmaengine: stm32-dma3: add device_pause and device_resume ops dmaengine: stm32-dma3: add DMA_MEMCPY capability ...
| * dt-bindings: fsl-qdma: fix interrupts 'if' check logicFrank Li2024-07-101-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All compatible string include 'fsl,ls1021a-qdma'. Previous if check are always true. if: properties: compatible: contains: enum: - fsl,ls1021a-qdma Change to check other compatible strings to get correct logic and fix below CHECK_DTB warnings. arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var1.dtb: dma-controller@8380000: interrupts: [[0, 43, 4], [0, 251, 4], [0, 252, 4], [0, 253, 4], [0, 254, 4]] is too long Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20240701195717.1843041-1-Frank.Li@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dt-bindings: dma: sprd,sc9860-dma: convert to YAMLStanislav Jakubek2024-07-102-44/+92
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert the Spreadtrum SC9860 DMA bindings to DT schema. Changes during conversion: - rename file to match compatible - make interrupts optional, the AGCP DMA controller doesn't need it - describe the optional ashb_eb clock for the AGCP DMA controller Signed-off-by: Stanislav Jakubek <stano.jakubek@gmail.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/Zob1+kGW1xeBKehA@standask-GA-A55M-S2HP Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dt-bindings: fsl-qdma: Convert to yaml formatFrank Li2024-06-112-58/+124
| | | | | | | | | | | | | | | | | | | | | | | | | | Convert binding doc from txt to yaml. Re-order interrupt-names to align example. Add #dma-cell in example. Change 'reg' in example to 32bit address. Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240528163734.2471268-1-Frank.Li@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dt-bindings: dma: Document STM32 DMA3 controller bindingsAmelie Delaunay2024-06-111-0/+135
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The STM32 DMA3 is a Direct Memory Access controller with different features depending on its hardware configuration. The channels have not the same capabilities, some have a larger FIFO, so their performance is higher. This patch describes STM32 DMA3 bindings, used to select a channel that fits client requirements, and to pre-configure the channel depending on the client needs. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com> Link: https://lore.kernel.org/r/20240531150712.2503554-5-amelie.delaunay@foss.st.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dt-bindings: dma: New directory for STM32 DMA controllers bindingsAmelie Delaunay2024-06-113-6/+6
| | | | | | | | | | | | | | | | | | | | | | Gather the STM32 DMA controllers bindings under ./dma/stm32/. Then fix reference to old path in spi/st,stm32-spi.yaml: update the dmas property description by referring to all STM32 DMA controllers bindings. Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com> Link: https://lore.kernel.org/r/20240531150712.2503554-2-amelie.delaunay@foss.st.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dt-bindings: dma: fsl,imx-dma: Convert to dtschemaAnimesh Agarwal2024-06-072-50/+56
| | | | | | | | | | | | | | | | | | | | Convert the fsl i.MX DMA controller bindings to DT schema. Remove old and deprecated properties #dma-channels and #dma-requests. Signed-off-by: Animesh Agarwal <animeshagarwal28@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240605003356.46458-1-animeshagarwal28@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* | Merge tag 'devicetree-for-6.11' of ↵Linus Torvalds2024-07-181-0/+1
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull devicetree updates from Rob Herring: "DT Bindings: - Convert and add a bunch of IBM FSI related bindings - Add a new schema listing legacy compatibles which will (probably) never be documented. This will silence various checks warning about them. - Add bindings for Sierra Wireless mangOH Green SPI IoT interface, new Arm 2024 Cortex and Neoverse CPUs, QCom sc8180x PDC, QCom SDX75 GPI DMA, imx8mp/imx8qxp fsl,irqsteer, and Renesas RZ/G2UL CRU and CSI-2 blocks - Convert Spreadtrum sprd-timer, FSL cpm_qe, FSL fsl,ls-scfg-msi, FSL q(b)man-*, FSL qoriq-mc, and img,pdc-wdt bindings to DT schema - Drop obsolete stericsson,abx500.txt DT core: - Update dtc to upstream version v1.7.0-93-g1df7b047fe43 - Add support to run DT validation on DTs with applied overlays - Add helper for creating boolean properties in dynamic nodes and use that for dynamic PCI nodes - Clean-up early parsing of '#{address,size}-cells'" * tag 'devicetree-for-6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (39 commits) dt-bindings: timer: sprd-timer: convert to YAML dt-bindings: incomplete-devices: document devices without bindings dt-bindings: trivial-devices: document the Sierra Wireless mangOH Green SPI IoT interface scripts/dtc: Update to upstream version v1.7.0-93-g1df7b047fe43 dt-bindings: soc: fsl: Add fsl,ls1028a-reset for reset syscon node dt-bindings: soc: fsl: cpm_qe: convert to yaml format dt-bindings: i2c: i2c-fsi: Convert to json-schema dt-bindings: fsi: Document the FSI Hub Controller dt-bindings: fsi: Document the AST2700 FSI controller dt-bindings: fsi: ast2600-fsi-master: Convert to json-schema dt-bindings: fsi: ibm,i2cr-fsi-master: Reference common FSI controller dt-bindings: fsi: Document the FSI controller common properties dt-bindings: fsi: Document the IBM SBEFIFO engine dt-bindings: fsi: p9-occ: Convert to json-schema dt-bindings: fsi: Document the IBM SCOM engine dt-bindings: fsi: fsi2spi: Document SPI controller child nodes dt-bindings: interrupt-controller: convert fsl,ls-scfg-msi to yaml dt-bindings: soc: fsl: Convert q(b)man-* to yaml format dt-bindings: misc: fsl,qoriq-mc: convert to yaml format dt-bindings: drop stale Anson Huang from maintainers ...
| * | dt-bindings: dma: qcom,gpi: document the SDX75 GPI DMA EngineRohit Agarwal2024-07-091-0/+1
| |/ | | | | | | | | | | | | | | | | Document the GPI DMA Engine on the SDX75 Platform. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240517100423.2006022-2-quic_rohiagar@quicinc.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
* / dt-bindings: dma: fsl-edma: fix dma-channels constraintsKrzysztof Kozlowski2024-06-111-2/+2
|/ | | | | | | | | | | | | dma-channels is a number, not a list. Apply proper constraints on the actual number. Fixes: 6eb439dff645 ("dt-bindings: fsl-dma: fsl-edma: add edma3 compatible string") Cc: stable@vger.kernel.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Peng Fan <peng.fan@nxp.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20240521083002.23262-1-krzysztof.kozlowski@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
* Merge tag 'dmaengine-6.10-rc1' of ↵Linus Torvalds2024-05-215-159/+119
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine Pull dmaengine updates from Vinod Koul: "New HW support: - Freescale i.MX8ULP edma support in edma driver - StarFive JH8100 DMA support in Synopsis axi-dmac driver Updates: - Tracing support for freescale edma driver, updates to dpaa2 driver - Remove unused QCom hidma DT support - Support for i2c dma in imx-sdma - Maintainers update for idxd and edma drivers" * tag 'dmaengine-6.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine: (42 commits) MAINTAINERS: Update role for IDXD driver dmaengine: fsl-edma: use _Generic to handle difference type dmaengine: fsl-edma: add trace event support dmaengine: idxd: Avoid unnecessary destruction of file_ida dmaengine: xilinx: xdma: fix module autoloading dt-bindings: dma: fsl-edma: allow 'power-domains' property dt-bindings: dma: fsl-edma: remove 'clocks' from required dmaengine: fsl-dpaa2-qdma: Fix kernel-doc check warning dmaengine: imx-sdma: Add i2c dma support dmaengine: imx-sdma: utilize compiler to calculate ADDRS_ARRAY_SIZE_V<n> dt-bindings: fsl-imx-sdma: Add I2C peripheral types ID dt-bindings: fsl-dma: fsl-edma: clean up unused "fsl,imx8qm-adma" compatible string dmaengine: fsl-edma: clean up unused "fsl,imx8qm-adma" compatible string dt-bindings: dma: Drop unused QCom hidma binding dmaengine: qcom: Drop hidma DT support dmaengine: pl08x: Use kcalloc() instead of kzalloc() dmaengine: fsl-dpaa2-qdma: Update DPDMAI interfaces to version 3 dmaengine: fsl-edma: fix miss mutex unlock at an error return path dmaengine: pch_dma: remove unused function chan2parent dmaengine: fsl-dpaa2-qdma: Add dpdmai_cmd_open ...
| * dt-bindings: dma: fsl-edma: allow 'power-domains' propertyFrank Li2024-04-251-38/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allow 'power-domains' property because i.MX8DXL i.MX8QM and i.MX8QXP need it. EDMA supports each power-domain for each dma channel. So minItems and maxItems align 'dma-channels'. Change fsl,imx93-edma3 example to fsl,imx8qm-edma to reflect this variants. Fixed below DTB_CHECK warning: dma-controller@599f0000: Unevaluated properties are not allowed ('power-domains' was unexpected) Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20240417152457.361340-2-Frank.Li@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dt-bindings: dma: fsl-edma: remove 'clocks' from requiredFrank Li2024-04-251-1/+16
| | | | | | | | | | | | | | | | | | | | | | fsl,imx8qm-adma and fsl,imx8qm-edma don't require 'clocks'. Remove it from required and add 'if' block for other compatible string to keep the same restrictions. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20240417152457.361340-1-Frank.Li@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dt-bindings: fsl-imx-sdma: Add I2C peripheral types IDFrank Li2024-04-251-0/+1
| | | | | | | | | | | | | | | | | | | | Add peripheral types ID 27 for I2C because sdma firmware (sdma-6q: v3.6, sdma-7d: v4.6) support I2C DMA transfer. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20240419150729.1071904-1-Frank.Li@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dt-bindings: fsl-dma: fsl-edma: clean up unused "fsl,imx8qm-adma" compatible ↵Joy Zou2024-04-251-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | string The eDMA hardware issue only exist imx8QM A0. A0 never mass production. The compatible string "fsl,imx8qm-adma" is unused. So remove it safely. Signed-off-by: Joy Zou <joy.zou@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20240424064508.1886764-3-joy.zou@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dt-bindings: dma: Drop unused QCom hidma bindingRob Herring (Arm)2024-04-251-95/+0
| | | | | | | | | | | | | | | | | | | | | | | | The QCom hidma binding was used on a defunct QCom server platform which mainly used ACPI. DT support in the Linux driver has been broken since 2018, so it seems this binding is unused and can be dropped. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Link: https://lore.kernel.org/r/20240423161413.481670-2-robh@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dt-bindings: dma: fsl-edma: add fsl,imx8ulp-edma compatible stringJoy Zou2024-04-071-2/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce the compatible string 'fsl,imx8ulp-edma' to enable support for the i.MX8ULP's eDMA, alongside adjusting the clock numbering. The i.MX8ULP eDMA architecture features one clock for each DMA channel and an additional clock for the core controller. Given a maximum of 32 DMA channels, the maximum clock number consequently increases to 33. Signed-off-by: Joy Zou <joy.zou@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20240323-8ulp_edma-v3-4-c0e981027c05@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dt-bindings: dma: snps,dw-axi-dmac: Add JH8100 supportTan Chun Hau2024-04-071-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for StarFive JH8100 SoC in Sysnopsys Designware AXI DMA controller. Both JH8100 and JH7110 require reset operation in device probe. However, JH8100 doesn't need to apply different configuration on CH_CFG registers. Signed-off-by: Tan Chun Hau <chunhau.tan@starfivetech.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20240327025126.229475-2-chunhau.tan@starfivetech.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dt-bindings: dma: snps,dma-spear1340: Fix data{-,_}width schemaRob Herring2024-04-071-21/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | 'data-width' and 'data_width' properties are defined as arrays, but the schema is defined as a matrix. That works currently since everything gets decoded in to matrices, but that is internal to dtschema and could change. Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Reviewed-by: Serge Semin <fancer.lancer@gmail.com> Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20240401204354.1691845-1-robh@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
* | dt-bindings: treewide: add access-controllers descriptionGatien Chevallier2024-04-052-0/+8
|/ | | | | | | | | | | | | | | access-controllers is an optional property that allows a peripheral to refer to one or more domain access controller(s). Description of this property is added to all peripheral binding files of the peripheral under the STM32 firewall controller. It allows an accurate representation of the hardware, where various peripherals are connected to a firewall bus. The firewall can then check the peripheral accesses before allowing its device to probe. Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
* Merge tag 'devicetree-for-6.9' of ↵Linus Torvalds2024-03-151-1/+2
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull devicetree updates from Rob Herring: "DT core: - Add cleanup.h based auto release of struct device_node pointers via __free marking and new for_each_child_of_node_scoped() iterator to use it. - Always create a base skeleton DT when CONFIG_OF is enabled. This supports several usecases of adding DT data on non-DT booted systems. - Move around some /reserved-memory code in preparation for further improvements - Add a stub for_each_property_of_node() for !OF - Adjust the printk levels on some messages - Fix __be32 sparse warning - Drop RESERVEDMEM_OF_DECLARE usage from Freescale qbman driver (currently orphaned) - Add Saravana Kannan and drop Frank Rowand as DT maintainers DT bindings: - Convert Mediatek timer, Mediatek sysirq, fsl,imx6ul-tsc, fsl,imx6ul-pinctrl, Atmel AIC, Atmel HLCDC, FPGA region, and xlnx,sd-fec to DT schemas - Add existing, but undocumented fsl,imx-anatop binding - Add bunch of undocumented vendor prefixes used in compatible strings - Drop obsolete brcm,bcm2835-pm-wdt binding - Drop obsolete i2c.txt which as been replaced with schema in dtschema - Add DPS310 device and sort trivial-devices.yaml - Enable undocumented compatible checks on DT binding examples - More QCom maintainer fixes/updates - Updates to writing-schema.rst and DT submitting-patches.rst to cover some frequent review comments - Clean-up SPDX tags to use 'OR' rather than 'or'" * tag 'devicetree-for-6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (56 commits) dt-bindings: soc: imx: fsl,imx-anatop: add imx6q regulators of: unittest: Use for_each_child_of_node_scoped() of: Introduce for_each_*_child_of_node_scoped() to automate of_node_put() handling of: Add cleanup.h based auto release via __free(device_node) markings of: Move all FDT reserved-memory handling into of_reserved_mem.c of: Add KUnit test to confirm DTB is loaded of: unittest: treat missing of_root as error instead of fixing up x86/of: Unconditionally call unflatten_and_copy_device_tree() um: Unconditionally call unflatten_device_tree() of: Create of_root if no dtb provided by firmware of: Always unflatten in unflatten_and_copy_device_tree() dt-bindings: timer: mediatek: Convert to json-schema dt-bindings: interrupt-controller: fsl,intmux: Include power-domains support soc: fsl: qbman: Remove RESERVEDMEM_OF_DECLARE usage dt-bindings: fsl-imx-sdma: fix HDMI audio index dt-bindings: soc: imx: fsl,imx-iomuxc-gpr: add imx6 dt-bindings: soc: imx: fsl,imx-anatop: add binding dt-bindings: input: touchscreen: fsl,imx6ul-tsc convert to YAML dt-bindings: pinctrl: fsl,imx6ul-pinctrl: convert to YAML of: make for_each_property_of_node() available to to !OF ...
| * dt-bindings: fsl-imx-sdma: fix HDMI audio indexSebastian Reichel2024-03-051-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | HDMI Audio has been added to the DT binding documentation with an incorrect index. DT and the driver use index 26. This happened, because the binding is missing MULTI_SAI type, which is using index 25. Reported-by: Michael Yackavage <michaely@ips-yes.com> Fixes: 7bdbd87d4008 ("dt-bindings: fsl-imx-sdma: Convert imx sdma to DT schema") Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Sebastian Reichel <sre@kernel.org> Link: https://lore.kernel.org/r/20240226212740.2019837-6-sre@kernel.org Signed-off-by: Rob Herring <robh@kernel.org>
* | dt-bindings: renesas,rcar-dmac: Add r8a779h0 supportGeert Uytterhoeven2024-02-161-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Document support for the Direct Memory Access Controllers (DMAC) in the Renesas R-Car V4M (R8A779H0) SoC. Based on a patch in the BSP by Thanh Le. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/96aad3b532ee401f19693e18038494f43ddb90e9.1707915609.git.geert+renesas@glider.be Signed-off-by: Vinod Koul <vkoul@kernel.org>
* | dt-bindings: dma: convert MediaTek High-Speed controller to the json-schemaRafał Miłecki2024-02-162-33/+63
| | | | | | | | | | | | | | | | | | | | | | This helps validating DTS files. Introduced changes: 1. Adjusted "reg" in example 2. Added includes to example Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20240213063919.20196-1-zajec5@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* | dt-bindings: fsl-dma: fsl-edma: add fsl,imx95-edma5 compatible stringFrank Li2024-02-071-0/+2
| | | | | | | | | | | | | | | | | | | | Add the compatible string 'fsl,imx95-edma5' to support the i.MX95's eDMA, which features 64-bit physical address support. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20231221153528.1588049-6-Frank.Li@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* | dt-bindings: mmp-dma: convert to YAMLDuje Mihanović2024-02-072-81/+72
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert the Marvell MMP DMA binding to YAML. The TXT binding mentions that the controller may have one IRQ per DMA channel. Examples of this were dropped in the YAML binding because of dt_binding_check complaints (either too many interrupt cells or interrupts) and the fact that this is not used in any of the in-tree device trees. Signed-off-by: Duje Mihanović <duje.mihanovic@skole.hr> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20240131-pxa-dma-yaml-v2-2-9611d0af0edc@skole.hr Signed-off-by: Vinod Koul <vkoul@kernel.org>
* | dt-bindings: dma: allwinner,sun50i-a64-dma: Add compatible for H616Chen-Yu Tsai2024-01-301-4/+8
|/ | | | | | | | | | | | | | | The DMA controllers found on the H616 and H618 are the same as the one found on the A100. The only difference is the DMA endpoint (DRQ) layout. Since the number of channels and endpoints are described with additional generic properties, just add a new H616-specific compatible string and fallback to the A100 one. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Link: https://lore.kernel.org/r/20240127163247.384439-5-wens@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
* dt-bindings: dmaengine: Add Loongson LS2X APB DMA controllerBinbin Zhou2023-12-211-0/+62
| | | | | | | | | | Add Loongson LS2X APB DMA controller binding with DT schema format using json-schema. Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn> Link: https://lore.kernel.org/r/078307641077edaf46dd986c6d31cea15545a208.1702365725.git.zhoubinbin@loongson.cn Signed-off-by: Vinod Koul <vkoul@kernel.org>
* dt-bindings: dma: Add dma-channel-mask to nvidia,tegra210-admaMohan Kumar2023-12-111-0/+3
| | | | | | | | | | Add dma-channel-mask binding doc support to nvidia,tegra210-adma to reserve the adma channel usage Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Mohan Kumar <mkumard@nvidia.com> Link: https://lore.kernel.org/r/20231128071615.31447-2-mkumard@nvidia.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* dt-bindings: dma: sf-pdma: add new compatible nameShravan Chippa2023-12-111-0/+1
| | | | | | | | | | Add new compatible name microchip,mpfs-pdma to support out of order dma transfers Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Shravan Chippa <shravan.chippa@microchip.com> Link: https://lore.kernel.org/r/20231208103856.3732998-3-shravan.chippa@microchip.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* dt-bindings: dma: Drop undocumented examplesRob Herring2023-12-112-26/+0
| | | | | | | | | | | | | | | The compatibles "ti,omap-sdma" and "ti,dra7-dma-crossbar" aren't documented by a schema which causes warnings: Documentation/devicetree/bindings/dma/dma-controller.example.dtb: /example-0/dma-controller@48000000: failed to match any schema with compatible: ['ti,omap-sdma'] Documentation/devicetree/bindings/dma/dma-router.example.dtb: /example-0/dma-router@4a002b78: failed to match any schema with compatible: ['ti,dra7-dma-crossbar'] As no one has cared to fix them, just drop them. Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231122235050.2966280-1-robh@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
* dt-bindings: dma: qcom,gpi: document the SM8650 GPI DMA EngineNeil Armstrong2023-11-241-0/+1
| | | | | | | | | Document the GPI DMA Engine on the SM8650 Platform. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231025-topic-sm8650-upstream-bindings-gpi-v2-1-4de85293d730@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
* dt-bindings: dma: rz-dmac: Document RZ/Five SoCLad Prabhakar2023-11-241-1/+1
| | | | | | | | | | | | | | | | The DMAC block on the RZ/Five SoC is identical to one found on the RZ/G2UL SoC. "renesas,r9a07g043-dmac" compatible string will be used on the RZ/Five SoC so to make this clear, update the comment to include RZ/Five SoC. No driver changes are required as generic compatible string "renesas,rz-dmac" will be used as a fallback on RZ/Five SoC. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20231102203922.548353-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* dt-bindings: dma: qcom: gpi: add compatible for X1E80100Sibi Sankar2023-11-241-0/+1
| | | | | | | | | | The Qualcomm X1E80100 uses GPI DMA for its GENI interface. Add a compatible string for it in the documentation by using the SM6350 as fallback. Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231124100608.29964-4-quic_sibis@quicinc.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* dt-bindings: dma: ti: k3-udma: Describe cfg register regionsVignesh Raghavendra2023-11-241-2/+13
| | | | | | | | | | | | | | | | Unified DMA (UDMA) module on K3 SoCs have TX and RX channel cfg and RX flow cfg register regions which are usually configured by a Device Management firmware. But certain entities such as bootloader (like U-Boot) may have to access them directly. Describe this region in the binding documentation for completeness of module description. Keep the binding compatible with existing DTS files by requiring first four regions to be present at least. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231124045722.191817-5-vigneshr@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* dt-bindings: dma: ti: k3-pktdma: Describe cfg register regionsVignesh Raghavendra2023-11-241-2/+18
| | | | | | | | | | | | | | | | Packet DMA (PKTDMA) module on K3 SoCs have ring cfg, TX and RX channel cfg and RX flow cfg register regions which are usually configured by a Device Management firmware. But certain entities such as bootloader (like U-Boot) may have to access them directly. Describe this region in the binding documentation for completeness of module description. Keep the binding compatible with existing DTS files by requiring first four regions to be present at least. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231124045722.191817-4-vigneshr@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* dt-bindings: dma: ti: k3-bcdma: Describe cfg register regionsVignesh Raghavendra2023-11-241-4/+19
| | | | | | | | | | | | | | | | Block copy DMA(BCDMA)module on K3 SoCs have ring, BCHAN, TX and RX channel cfg register regions which are usually configured by a Device Management firmware. But certain entities such as bootloader (like U-Boot) may have to access them directly. Describe this region in the binding documentation for completeness of module description. Keep the binding compatible with existing DTS files by requiring first five regions to be present at least. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231124045722.191817-3-vigneshr@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* dt-bindings: dma: ti: k3-*: Add descriptions for register regionsVignesh Raghavendra2023-11-243-5/+24
| | | | | | | | | | | In preparation for introducing more register regions, add description for existing register regions so that its easier to map reg-names to that of SoC Documentations/TRMs. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231124045722.191817-2-vigneshr@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* Merge tag 'dmaengine-6.7-rc1' of ↵Linus Torvalds2023-11-041-0/+2
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine Pull dmaengine updates from Vinod Koul: - Big pile of __counted_by attribute annotations to several structures for bounds checking of flexible arrays at run-time - Another big pile platform remove callback returning void changes - Device tree device_get_match_data() usage and dropping of_match_device() calls - Minor driver updates to pxa, idxd fsl, hisi etc drivers * tag 'dmaengine-6.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine: (106 commits) dmaengine: stm32-mdma: correct desc prep when channel running dmaengine: dw-axi-dmac: Add support DMAX_NUM_CHANNELS > 16 dmaengine: xilinx: xilinx_dma: Fix kernel doc about xilinx_dma_remove() dmaengine: mmp_tdma: drop unused variable 'of_id' MAINTAINERS: Add entries for NXP(Freescale) eDMA drivers dmaengine: xilinx: xdma: Support cyclic transfers dmaengine: xilinx: xdma: Prepare the introduction of cyclic transfers dmaengine: Drop unnecessary of_match_device() calls dmaengine: Use device_get_match_data() dmaengine: pxa_dma: Annotate struct pxad_desc_sw with __counted_by dmaengine: pxa_dma: Remove an erroneous BUG_ON() in pxad_free_desc() dmaengine: xilinx: xdma: Use resource_size() in xdma_probe() dmaengine: fsl-dpaa2-qdma: Remove redundant initialization owner in dpaa2_qdma_driver dmaengine: Remove unused declaration dma_chan_cleanup() dmaengine: mmp: fix Wvoid-pointer-to-enum-cast warning dmaengine: qcom: fix Wvoid-pointer-to-enum-cast warning dmaengine: fsl-edma: Remove redundant dev_err() for platform_get_irq() dmaengine: ep93xx_dma: Annotate struct ep93xx_dma_engine with __counted_by dmaengine: idxd: add wq driver name support for accel-config user tool dmaengine: fsl-edma: Annotate struct struct fsl_edma_engine with __counted_by ...
| * dt-bindings: dmaengine: qcom: gpi: Allow dma-coherentKonrad Dybcio2023-10-021-0/+2
| | | | | | | | | | | | | | | | | | | | On SM8550, the GPI DMA controller is coherent with the CPU. Allow specifying that. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230830-topic-8550_dmac2-v1-1-49bb25239fb1@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
* | dt-bindings: dmaengine: zynqmp_dma: add xlnx,bus-width required propertyRadhey Shyam Pandey2023-09-281-0/+3
|/ | | | | | | | | | | | | | xlnx,bus-width is a required property. In yaml conversion somehow it got missed out. Bring it back and mention it in required list. Also add Harini and myself to the maintainer list. Fixes: 5a04982df8da ("dt-bindings: dmaengine: zynqmp_dma: convert to yaml") Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Michael Tretter <m.tretter@pengutronix.de> Reviewed-by: Peter Korsgaard <peter@korsgaard.com> Link: https://lore.kernel.org/r/1695216326-3841352-1-git-send-email-radhey.shyam.pandey@amd.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* Merge tag 'dmaengine-6.6-rc1' of ↵Linus Torvalds2023-09-036-99/+232
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine Pull dmaengine updates from Vinod Koul: "New controller support and updates to drivers. New support: - Qualcomm SM6115 and QCM2290 dmaengine support - at_xdma support for microchip,sam9x7 controller Updates: - idxd updates for wq simplification and ats knob updates - fsl edma updates for v3 support - Xilinx AXI4-Stream control support - Yaml conversion for bcm dma binding" * tag 'dmaengine-6.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine: (53 commits) dmaengine: fsl-edma: integrate v3 support dt-bindings: fsl-dma: fsl-edma: add edma3 compatible string dmaengine: fsl-edma: move tcd into struct fsl_dma_chan dmaengine: fsl-edma: refactor chan_name setup and safety dmaengine: fsl-edma: move clearing of register interrupt into setup_irq function dmaengine: fsl-edma: refactor using devm_clk_get_enabled dmaengine: fsl-edma: simply ATTR_DSIZE and ATTR_SSIZE by using ffs() dmaengine: fsl-edma: move common IRQ handler to common.c dmaengine: fsl-edma: Remove enum edma_version dmaengine: fsl-edma: transition from bool fields to bitmask flags in drvdata dmaengine: fsl-edma: clean up EXPORT_SYMBOL_GPL in fsl-edma-common.c dmaengine: fsl-edma: fix build error when arch is s390 dmaengine: idxd: Fix issues with PRS disable sysfs knob dmaengine: idxd: Allow ATS disable update only for configurable devices dmaengine: xilinx_dma: Program interrupt delay timeout dmaengine: xilinx_dma: Use tasklet_hi_schedule for timing critical usecase dmaengine: xilinx_dma: Freeup active list based on descriptor completion bit dmaengine: xilinx_dma: Increase AXI DMA transaction segment count dmaengine: xilinx_dma: Pass AXI4-Stream control words to dma client dt-bindings: dmaengine: xilinx_dma: Add xlnx,irq-delay property ...
| * dt-bindings: fsl-dma: fsl-edma: add edma3 compatible stringFrank Li2023-08-221-7/+99
| | | | | | | | | | | | | | | | | | | | Extend Freescale eDMA driver bindings to support eDMA3 IP blocks in i.MX8QM and i.MX8QXP SoCs. In i.MX93, both eDMA3 and eDMA4 are now. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20230821161617.2142561-12-Frank.Li@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dt-bindings: dmaengine: xilinx_dma: Add xlnx,irq-delay propertyRadhey Shyam Pandey2023-08-211-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add an optional AXI DMA property 'xlnx,irq-delay'. It specifies interrupt timeout value and causes the DMA engine to generate an interrupt after the delay time period has expired. Timer begins counting at the end of a packet and resets with receipt of a new packet or a timeout event occurs. This property is useful when AXI DMA is connected to the streaming IP i.e axiethernet where inter packet latency is critical while still taking the benefit of interrupt coalescing. Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/1691387509-2113129-3-git-send-email-radhey.shyam.pandey@amd.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dt-bindings: dmaengine: xilinx_dma:Add xlnx,axistream-connected propertyRadhey Shyam Pandey2023-08-211-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | Add an optional AXI DMA property 'xlnx,axistream-connected'. This can be specified to indicate that DMA is connected to a streaming IP in the hardware design and dma driver needs to do some additional handling i.e pass metadata and perform streaming IP specific configuration. Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/1691387509-2113129-2-git-send-email-radhey.shyam.pandey@amd.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dt-bindings: dmaengine: at_xdmac: add compatible with microchip,sam9x7Varshini Rajendran2023-08-011-1/+2
| | | | | | | | | | | | | | | | | | Add compatible for sam9x7. Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230728102451.265869-1-varshini.rajendran@microchip.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dt-bindings: dma: qcom,bam: require one of control methodsKrzysztof Kozlowski2023-07-121-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The BAM DMA resources can be controlled remotely (e.g. by trusted environment; needs qcom,powered-remotely or qcom,controlled-remotely properties) or locally. In the latter case we need to provide its clock. Require one of methods of such control to properly validate DTS. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230626145645.646136-1-krzysztof.kozlowski@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dt-bindings: dma: convert bcm2835-dma bindings to YAMLStefan Wahren2023-07-122-83/+102
| | | | | | | | | | | | | | | | | | Convert the DT binding document for bcm2835-dma from .txt to YAML. Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230617133620.53129-3-stefan.wahren@i2se.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dt-bindings: dma: Increase iommu maxItems for BAM DMABhupesh Sharma2023-07-121-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Since SM8250 BAM DMA engine supports six iommu entries, increase the maxItems in the iommu property section, without which 'dtbs_check' would throw errors. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Tested-by: Anders Roxell <anders.roxell@linaro.org> Tested-by: Linux Kernel Functional Testing <lkft@linaro.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Link: https://lore.kernel.org/r/20230630082230.2264698-3-bhupesh.sharma@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dt-bindings: dma: Add support for SM6115 and QCM2290 SoCsBhupesh Sharma2023-07-121-7/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add new compatible for BAM DMA engine version v1.7.4 which is found on Qualcomm SM6115 and QCM2290 SoCs. Since its very similar to v1.7.0 used on SM8150 like SoCs, mark the comptible scheme accordingly. While at it, also update qcom,bam-dma bindings to add comments which describe the BAM DMA versions used in SM8150 and SM8250 SoCs. This provides an easy reference for identifying the actual BAM DMA version available on Qualcomm SoCs. Acked-by: Rob Herring <robh@kernel.org> Tested-by: Anders Roxell <anders.roxell@linaro.org> Tested-by: Linux Kernel Functional Testing <lkft@linaro.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Link: https://lore.kernel.org/r/20230630082230.2264698-2-bhupesh.sharma@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
generated by cgit v1.2.3 (git 2.39.1) at 2025-01-23 10:26:55 +0100