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2014-11-26irqchip: dw-apb-ictl: Enable IRQ_GC_MASK_CACHE_PER_TYPEJisheng Zhang1-0/+1
The irq_chip_type instances have separate mask registers, so we need to enable IRQ_GC_MASK_CACHE_PER_TYPE to actually handle separate mask registers. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Link: https://lkml.kernel.org/r/1415773374-4629-3-git-send-email-jszhang@marvell.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-11-26irqchip: dw-apb-ictl: Always use use {readl|writel}_relaxedJisheng Zhang1-6/+6
There's no DMA at all, the device type memory attribute can ensure the operations order and relaxed version imply compiler barrier, so we are safe to use relaxed version to improve the performance a bit. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Link: https://lkml.kernel.org/r/1415773374-4629-2-git-send-email-jszhang@marvell.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-11-26ARM: orion: convert the irq_reg_{readl,writel} calls to the new APIGregory CLEMENT1-4/+4
The commit "genirq: Generic chip: Change irq_reg_{readl,writel} arguments" modified the API. In the same tome the arch/arm/plat-orion/gpio.c file received a fix with the use of the old API: "ARM: orion: Fix for certain sequence of request_irq can cause irq storm". This commit fixes the use of the API. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Olof Johansson <olof@lixom.net> Link: https://lkml.kernel.org/r/1416928752-24529-1-git-send-email-gregory.clement@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-11-09irqchip: atmel-aic: Add missing entry for rm9200 irq fixupsBoris BREZILLON1-0/+1
The at91rm9200 have an RTT block and thus must at91rm9200_aic_irq_fixup has to be called when initializing the irqchip. Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Link: https://lkml.kernel.org/r/1415003464-29239-6-git-send-email-boris.brezillon@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-11-09irqchip: atmel-aic: Rename at91sam9_aic_irq_fixup for naming consistencyBoris BREZILLON1-3/+3
Rename at91sam9_aic_irq_fixup into at91rm9200_aic_irq_fixup to be consistent with other fixup functions. Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Link: https://lkml.kernel.org/r/1415003464-29239-5-git-send-email-boris.brezillon@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-11-09irqchip: atmel-aic: Add specific irq fixup function for sam9g45 and sam9rlBoris BREZILLON1-2/+8
The at91sam9g45 and at91sam9rl SoCs embed one RTT (Real Time Timer) and one RTC block and thus need to call both rtt and rtc fixup functions. Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Link: https://lkml.kernel.org/r/1415003464-29239-4-git-send-email-boris.brezillon@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-11-09irqchip: atmel-aic: Add irq fixups for at91sam926x SoCsBoris BREZILLON1-0/+9
The at91sam9260, at91sam9261, at91sam9263 and at91sam9g20 embed an RTT (Real Time Timer) block and thus need to call the aic_common_rtt_irq_fixup function. Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Link: https://lkml.kernel.org/r/1415003464-29239-3-git-send-email-boris.brezillon@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-11-09irqchip: atmel-aic: Add irq fixup for RTT blockBoris BREZILLON2-0/+28
Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Link: https://lkml.kernel.org/r/1415003464-29239-2-git-send-email-boris.brezillon@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-11-09irqchip: brcmstb-l2: Convert driver to use irq_reg_{readl,writel}Kevin Cernekee1-12/+22
This effectively converts the __raw_ accessors to the non-__raw_ equivalents. To handle BE, we pass IRQ_GC_BE_IO, similar to what was done in irq-bcm7120-l2.c. Since irq_reg_writel now takes an irq_chip_generic argument, writel must be used for the initial hardware reset in the probe function. But that operation never needs endian swapping, so it's probably not a big deal. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Link: https://lkml.kernel.org/r/1415342669-30640-15-git-send-email-cernekee@gmail.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-11-09irqchip: bcm7120-l2: Convert driver to use irq_reg_{readl,writel}Kevin Cernekee1-10/+14
On BE MIPS systems this needs to use the new IRQ_GC_BE_IO gc_flag. In all other cases it will use the standard readl/writel accessors. The initial irq_fwd_mask setup runs before "gc" is initialized, so it is unchanged for now. This could potentially be a problem on an ARM system that boots in LE mode but runs a BE kernel, but currently none of the supported ARM platforms are ever expected to run BE. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Link: https://lkml.kernel.org/r/1415342669-30640-14-git-send-email-cernekee@gmail.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-11-09irqchip: bcm7120-l2: Decouple driver from brcmstb-l2Kevin Cernekee4-3/+9
Some chips, such as BCM6328, only require bcm7120-l2. Some BCM7xxx STB configurations only require brcmstb-l2. Treat them as two separate entities, and update the mach-bcm dependencies to reflect the change. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lkml.kernel.org/r/1415342669-30640-13-git-send-email-cernekee@gmail.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-11-09irqchip: bcm7120-l2: Extend driver to support 64+ bit controllersKevin Cernekee2-57/+113
Most implementations of the bcm7120-l2 controller only have a single 32-bit enable word + 32-bit status word. But some instances have added more enable/status pairs in order to support 64+ IRQs (which are all ORed into one parent IRQ input). Make the following changes to allow the driver to support this: - Extend DT bindings so that multiple words can be specified for the reg property, various masks, etc. - Add loops to the probe/handle functions to deal with each word separately - Allocate 1 generic-chip for every 32 IRQs, so we can still use the clr/set helper functions - Update the documentation This uses one domain per bcm7120-l2 DT node. If the DT node defines multiple enable/status pairs (i.e. >=64 IRQs) then the driver will create a single IRQ domain with 2+ generic chips. Multiple generic chips are required because the generic-chip code can only handle one enable/status register pair per instance. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Link: https://lkml.kernel.org/r/1415342669-30640-12-git-send-email-cernekee@gmail.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-11-09irqchip: bcm7120-l2: Use gc->mask_cache to simplify suspend/resume functionsKevin Cernekee1-8/+3
The cached value already incorporates irq_fwd_mask, and was saved the last time an IRQ was enabled/disabled. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Link: https://lkml.kernel.org/r/1415342669-30640-11-git-send-email-cernekee@gmail.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-11-09irqchip: bcm7120-l2: Fix missing nibble in gc->unused maskKevin Cernekee1-1/+1
This mask should have been 0xffff_ffff, not 0x0fff_ffff. The change should not have an effect on current users (STB) because bits 31:27 are unused. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lkml.kernel.org/r/1415342669-30640-10-git-send-email-cernekee@gmail.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-11-09irqchip: bcm7120-l2: Make sure all register accesses use base+offsetKevin Cernekee1-3/+3
A couple of accesses to IRQEN (base+0x00) just used "base" directly, so they would break if IRQEN ever became nonzero. Make sure that all reads/writes specify the register offset constant. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Link: https://lkml.kernel.org/r/1415342669-30640-9-git-send-email-cernekee@gmail.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-11-09irqchip: bcm7120-l2, brcmstb-l2: Remove ARM Kconfig dependencyKevin Cernekee1-1/+0
This can compile for MIPS (or anything else) now. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lkml.kernel.org/r/1415342669-30640-8-git-send-email-cernekee@gmail.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-11-09irqchip: bcm7120-l2: Eliminate bad IRQ checkKevin Cernekee1-11/+2
This check may be prone to race conditions, e.g. 1) Some external event (e.g. GPIO level) causes an IRQ to become pending 2) Peripheral asserts the L2 IRQ 3) CPU takes an interrupt 4) The event from #1 goes away 5) bcm7120_l2_intc_irq_handle() reads back a 0 status Unlike the hardware supported by brcmstb-l2, the bcm7120-l2 controller does not latch the IRQ status. Bits can change if the inputs to the controller change. Also, do_bad_IRQ() is an ARM-specific macro. So let's just nuke it. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Link: https://lkml.kernel.org/r/1415342669-30640-7-git-send-email-cernekee@gmail.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-11-09irqchip: brcmstb-l2: Eliminate dependency on ARM codeKevin Cernekee1-3/+4
The irq-brcmstb-l2 driver has a single dependency on the ARM code, the do_bad_IRQ macro. Expand this macro in-place so that the driver can be built on non-ARM platforms. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lkml.kernel.org/r/1415342669-30640-6-git-send-email-cernekee@gmail.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-11-09genirq: Generic chip: Add big endian I/O accessorsKevin Cernekee2-0/+18
Use io{read,write}32be if the caller specified IRQ_GC_BE_IO when creating the irqchip. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Acked-by: Arnd Bergmann <arnd@arndb.de> Link: https://lkml.kernel.org/r/1415342669-30640-5-git-send-email-cernekee@gmail.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-11-09genirq: Generic chip: Allow irqchip drivers to override irq_reg_{readl,writel}Kevin Cernekee1-2/+12
Currently, these I/O accessors always assume little endian 32-bit registers (readl/writel). On some systems the IRQ registers need to be accessed in BE mode or using 16-bit loads/stores, so we will provide a way to override the default behavior. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Acked-by: Arnd Bergmann <arnd@arndb.de> Link: https://lkml.kernel.org/r/1415342669-30640-4-git-send-email-cernekee@gmail.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-11-09genirq: Generic chip: Change irq_reg_{readl,writel} argumentsKevin Cernekee6-75/+78
Pass in the irq_chip_generic struct so we can use different readl/writel settings for each irqchip driver, when appropriate. Compute (gc->reg_base + reg_offset) in the helper function because this is pretty much what all callers want to do anyway. Compile-tested using the following configurations: at91_dt_defconfig (CONFIG_ATMEL_AIC_IRQ=y) sama5_defconfig (CONFIG_ATMEL_AIC5_IRQ=y) sunxi_defconfig (CONFIG_ARCH_SUNXI=y) tb10x (ARC) is untested. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Acked-by: Arnd Bergmann <arnd@arndb.de> Link: https://lkml.kernel.org/r/1415342669-30640-3-git-send-email-cernekee@gmail.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-11-09irqchip: irq-armada-370-xp: Use proper return value for ->set_affinity()Thomas Petazzoni1-1/+1
The ->set_affinity() hook of 'struct irq_chip' is supposed to return one of IRQ_SET_MASK_OK or IRQ_SET_MASK_OK_NOCOPY. However, the code currently simply returns 0. This patch fixes that by using IRQ_SET_MASK_OK, which tells the IRQ core that it is responsible for updating irq_data.affinity. Note that this patch does not cause any change to the compiled code, as IRQ_SET_MASK_OK has the value 0. This is therefore just a simple cleanup. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: linux-kernel@vger.kernel.org Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Link: https://lkml.kernel.org/r/1414151970-6626-4-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-11-02irqchip: dw-apb-ictl: Select GENERIC_IRQ_CHIPJisheng Zhang1-0/+1
The dw-apb-ictl driver uses the generic-chip functions. Thus it needs to select GENERIC_IRQ_CHIP in Kconfig. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Link: https://lkml.kernel.org/r/1413982750-832-1-git-send-email-jszhang@marvell.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-11-02irqchip: hip04: Convert to handle_domain_irqMarc Zyngier1-2/+1
The HIP04 GIC-like irqchip escaped the conversion to handle_domain_irq. Let's give it the treatment it deserves. Cc: Haojian Zhuang <haojian.zhuang@linaro.org> Cc: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Link: https://lkml.kernel.org/r/1413882576-18922-1-git-send-email-marc.zyngier@arm.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-11-01ARM: orion: Fix for certain sequence of request_irq can cause irq stormEvgeniy Dushistov1-4/+32
The problem is that hardware handled by arm/plat-orion/gpio.c, require ack for edge irq, and no ack for level irq. The code handle this issue, by two "struct irq_chip_type" per one "struct irq_chip_generic". For one "struct irq_chip_generic" irq_ack pointer is setted, for another it is NULL. But we have only one mask_cache per two "struct irq_chip_type". So if we 1)unmask interrupt A for "edge type" trigger, 2)unmask interrupt B for "level type" trigger, 3)unmask interrupt C for "edge type", we, because of usage of generic irq_gc_mask_clr_bit/irq_gc_mask_set_bit, have hardware configured to trigger interrupt B on "edge type", because of shared mask_cache. But kernel think that B is "level type", so when interrupt B occur via "edge" reason, we don't ack it, and B triggered again and again. Signed-off-by: Evgeniy A. Dushistov <dushistov@mail.ru> Link: https://lkml.kernel.org/r/20140726155659.GA22977@fifteen Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-11-01ARM: mvebu: armada xp: Generalize use of i2c quirkAndrew Lunn1-1/+1
A second product has come to light which makes use of the A0 stepping of the Armada XP SoC. A0 stepping has a hardware bug in the i2c core meaning that hardware offload does not work, resulting in the kernel failing to boot. The quirk detects that the kernel is running on an A0 stepping SoC and disables the use of hardware offload. Currently the quirk is only enabled for PlatHome Openblocks AX3. The AX3 has been produced with both A0 and B0 stepping SoCs. The second product is the Lenovo Iomega IX4-300d. It seems likely that this device will also swap from A0 to B0 SoC sometime during its life. If there are two products using A0, it seems likely there are more products with A0. Also, since the number of A0 SoCs is limited, these products are also likely to transition to B0. Hence detecting at run time is the safest option. So enable the quirk for all Armada XP boards. Tested on an AX3 with A0 stepping. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: stable@vger.kernel.org # v3.12+ Fixes: 930ab3d403ae: ("i2c: mv64xxx: Add I2C Transaction Generator support") Link: https://lkml.kernel.org/r/1406395238-29758-2-git-send-email-andrew@lunn.ch Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-10-20Linux 3.18-rc1v3.18-rc1Linus Torvalds1-2/+2
2014-10-19MAINTAINERS: corrected bcm2835 searchScott Branden1-6/+3
Corrected bcm2835 maintainer info by using N: to specify any files with bcm2835 in are directed to the proper maintainer. Also corrected minor mispelling of ARCHITECTURE in 2 comment locations. Signed-off-by: Scott Branden <sbranden@broadcom.com> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Olof Johansson <olof@lixom.net>
2014-10-19Net: DSA: Fix checking for get_phy_flags functionAndrew Lunn1-1/+1
The check for the presence or not of the optional switch function get_phy_flags() called the function, rather than checked to see if it is a NULL pointer. This causes a derefernce of a NULL pointer on all switch chips except the sf2, the only switch to implement this call. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Fixes: 6819563e646a ("net: dsa: allow switch drivers to specify phy_device::dev_flags") Cc: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-10-19sparc64: Do not define thread fpregs save area as zero-length array.David S. Miller1-1/+2
This breaks the stack end corruption detection facility. What that facility does it write a magic value to "end_of_stack()" and checking to see if it gets overwritten. "end_of_stack()" is "task_thread_info(p) + 1", which for sparc64 is the beginning of the FPU register save area. So once the user uses the FPU, the magic value is overwritten and the debug checks trigger. Fix this by making the size explicit. Due to the size we use for the fpsaved[], gsr[], and xfsr[] arrays we are limited to 7 levels of FPU state saves. So each FPU register set is 256 bytes, allocate 256 * 7 for the fpregs area. Reported-by: Meelis Roos <mroos@linux.ee> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-10-19sparc64: Fix corrupted thread fault code.David S. Miller2-6/+6
Every path that ends up at do_sparc64_fault() must install a valid FAULT_CODE_* bitmask in the per-thread fault code byte. Two paths leading to the label winfix_trampoline (which expects the FAULT_CODE_* mask in register %g4) were not doing so: 1) For pre-hypervisor TLB protection violation traps, if we took the 'winfix_trampoline' path we wouldn't have %g4 initialized with the FAULT_CODE_* value yet. Resulting in using the TLB_TAG_ACCESS register address value instead. 2) In the TSB miss path, when we notice that we are going to use a hugepage mapping, but we haven't allocated the hugepage TSB yet, we still have to take the window fixup case into consideration and in that particular path we leave %g4 not setup properly. Errors on this sort were largely invisible previously, but after commit 4ccb9272892c33ef1c19a783cfa87103b30c2784 ("sparc64: sun4v TLB error power off events") we now have a fault_code mask bit (FAULT_CODE_BAD_RA) that triggers due to this bug. FAULT_CODE_BAD_RA triggers because this bit is set in TLB_TAG_ACCESS (see #1 above) and thus we get seemingly random bus errors triggered for user processes. Fixes: 4ccb9272892c ("sparc64: sun4v TLB error power off events") Reported-by: Meelis Roos <mroos@linux.ee> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-10-18MAINTAINERS: Become the docs maintainerJonathan Corbet1-2/+1
It seems it's my turn to be the documentation maintainer for a bit. My plan is to work to ensure that docs patches don't fall through the cracks; I assume most changes will continue to flow through subsystem-specific trees. Acked-by: Jiri Kosina <jkosina@suse.cz> Signed-off-by: Jonathan Corbet <corbet@lwn.net> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2014-10-18x86,kvm,vmx: Preserve CR4 across VM entryAndy Lutomirski1-2/+14
CR4 isn't constant; at least the TSD and PCE bits can vary. TBH, treating CR0 and CR3 as constant scares me a bit, too, but it looks like it's correct. This adds a branch and a read from cr4 to each vm entry. Because it is extremely likely that consecutive entries into the same vcpu will have the same host cr4 value, this fixes up the vmcs instead of restoring cr4 after the fact. A subsequent patch will add a kernel-wide cr4 shadow, reducing the overhead in the common case to just two memory reads and a branch. Signed-off-by: Andy Lutomirski <luto@amacapital.net> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Cc: stable@vger.kernel.org Cc: Petr Matousek <pmatouse@redhat.com> Cc: Gleb Natapov <gleb@kernel.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2014-10-18ipv6: fix a potential use after free in sit.cLi RongQing1-3/+3
pskb_may_pull() maybe change skb->data and make iph pointer oboslete, fix it by geting ip header length directly. Fixes: ca15a078 (sit: generate icmpv6 error when receiving icmpv4 error) Cc: Oussama Ghorbel <ghorbel@pivasoftware.com> Signed-off-by: Li RongQing <roy.qing.li@gmail.com> Acked-by: Eric Dumazet <edumazet@google.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-10-18ipv6: fix a potential use after free in ip6_offload.cLi RongQing1-0/+1
pskb_may_pull() maybe change skb->data and make opth pointer oboslete, so set the opth again Signed-off-by: Li RongQing <roy.qing.li@gmail.com> Acked-by: Eric Dumazet <edumazet@google.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-10-18ipv4: fix a potential use after free in gre_offload.cLi RongQing1-3/+3
pskb_may_pull() may change skb->data and make greh pointer oboslete; so need to reassign greh; but since first calling pskb_may_pull already ensured that skb->data has enough space for greh, so move the reference of greh before second calling pskb_may_pull(), to avoid reassign greh. Fixes: 7a7ffbabf9("ipv4: fix tunneled VM traffic over hw VXLAN/GRE GSO NIC") Cc: Wei-Chun Chao <weichunc@plumgrid.com> Signed-off-by: Li RongQing <roy.qing.li@gmail.com> Acked-by: Eric Dumazet <edumazet@google.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-10-18tcp: fix build error if IPv6 is not enabledEric Dumazet1-0/+2
$ make M=net/ipv4 CC net/ipv4/route.o In file included from net/ipv4/route.c:102:0: include/net/tcp.h: In function ‘tcp_v6_iif’: include/net/tcp.h:738:32: error: ‘union <anonymous>’ has no member named ‘h6’ return TCP_SKB_CB(skb)->header.h6.iif; Signed-off-by: Eric Dumazet <edumazet@google.com> Fixes: 870c3151382c ("ipv6: introduce tcp_v6_iif()") Signed-off-by: David S. Miller <davem@davemloft.net>
2014-10-18futex: Ensure get_futex_key_refs() always implies a barrierCatalin Marinas1-0/+2
Commit b0c29f79ecea (futexes: Avoid taking the hb->lock if there's nothing to wake up) changes the futex code to avoid taking a lock when there are no waiters. This code has been subsequently fixed in commit 11d4616bd07f (futex: revert back to the explicit waiter counting code). Both the original commit and the fix-up rely on get_futex_key_refs() to always imply a barrier. However, for private futexes, none of the cases in the switch statement of get_futex_key_refs() would be hit and the function completes without a memory barrier as required before checking the "waiters" in futex_wake() -> hb_waiters_pending(). The consequence is a race with a thread waiting on a futex on another CPU, allowing the waker thread to read "waiters == 0" while the waiter thread to have read "futex_val == locked" (in kernel). Without this fix, the problem (user space deadlocks) can be seen with Android bionic's mutex implementation on an arm64 multi-cluster system. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Reported-by: Matteo Franchin <Matteo.Franchin@arm.com> Fixes: b0c29f79ecea (futexes: Avoid taking the hb->lock if there's nothing to wake up) Acked-by: Davidlohr Bueso <dave@stgolabs.net> Tested-by: Mike Galbraith <umgwanakikbuti@gmail.com> Cc: <stable@vger.kernel.org> Cc: Darren Hart <dvhart@linux.intel.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Ingo Molnar <mingo@kernel.org> Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2014-10-18bna: fix skb->truesize underestimationEric Dumazet1-1/+1
skb->truesize is not meant to be tracking amount of used bytes in an skb, but amount of reserved/consumed bytes in memory. For instance, if we use a single byte in last page fragment, we have to account the full size of the fragment. skb->truesize can be very different from skb->len, that has a very specific safety purpose. Signed-off-by: Eric Dumazet <edumazet@google.com> Cc: Rasesh Mody <rasesh.mody@qlogic.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-10-18net: dsa: add includes for ethtool and phy_fixed definitionsFlorian Fainelli2-0/+2
net/dsa/slave.c uses functions and structures declared in phy_fixed.h but does not explicitely include it, while dsa.h needs structure declarations for 'struct ethtool_wolinfo' and 'struct ethtool_eee', fix those by including the correct header files. Fixes: ec9436baedb6 ("net: dsa: allow drivers to do link adjustment") Fixes: ce31b31c68e7 ("net: dsa: allow updating fixed PHY link information") Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-10-18openvswitch: Set flow-key members.Pravin B Shelar1-3/+3
This patch adds missing memset which are required to initialize flow key member. For example for IP flow we need to initialize ip.frag for all cases. Found by inspection. This bug is introduced by commit 0714812134d7dcadeb7ecfbfeb18788aa7e1eaac ("openvswitch: Eliminate memset() from flow_extract"). Signed-off-by: Pravin B Shelar <pshelar@nicira.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-10-18netrom: use linux/uaccess.hFabian Frederick7-7/+7
replace asm/uaccess.h by linux/uaccess.h Signed-off-by: Fabian Frederick <fabf@skynet.be> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-10-18dsa: Fix conversion from host device to mii busGuenter Roeck2-8/+22
Commit b4d2394d01bc ("dsa: Replace mii_bus with a generic host device") replaces mii_bus with a generic host_dev, and introduces dsa_host_dev_to_mii_bus() to support conversion from host_dev to mii_bus. However, in some cases it uses to_mii_bus to perform that conversion. Since host_dev is not the phy bus device but typically a platform device, this fails and results in a crash with the affected drivers. BUG: unable to handle kernel NULL pointer dereference at (null) IP: [<ffffffff81781d35>] __mutex_lock_slowpath+0x75/0x100 PGD 406783067 PUD 406784067 PMD 0 Oops: 0002 [#1] SMP ... Call Trace: [<ffffffff810a538b>] ? pick_next_task_fair+0x61b/0x880 [<ffffffff81781de3>] mutex_lock+0x23/0x37 [<ffffffff81533244>] mdiobus_read+0x34/0x60 [<ffffffff8153b95a>] __mv88e6xxx_reg_read+0x8a/0xa0 [<ffffffff8153b9bc>] mv88e6xxx_reg_read+0x4c/0xa0 Fixes: b4d2394d01bc ("dsa: Replace mii_bus with a generic host device") Cc: Alexander Duyck <alexander.h.duyck@intel.com> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Acked-by: Alexander Duyck <alexander.h.duyck@redhat.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-10-18tipc: fix bug in bundled buffer receptionJon Paul Maloy1-1/+6
In commit ec8a2e5621db2da24badb3969eda7fd359e1869f ("tipc: same receive code path for connection protocol and data messages") we omitted the the possiblilty that an arriving message extracted from a bundle buffer may be a multicast message. Such messages need to be to be delivered to the socket via a separate function, tipc_sk_mcast_rcv(). As a result, small multicast messages arriving as members of a bundle buffer will be silently dropped. This commit corrects the error by considering this case in the function tipc_link_bundle_rcv(). Signed-off-by: Jon Maloy <jon.maloy@ericsson.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-10-18ipv6: introduce tcp_v6_iif()Eric Dumazet5-15/+30
Commit 971f10eca186 ("tcp: better TCP_SKB_CB layout to reduce cache line misses") added a regression for SO_BINDTODEVICE on IPv6. This is because we still use inet6_iif() which expects that IP6 control block is still at the beginning of skb->cb[] This patch adds tcp_v6_iif() helper and uses it where necessary. Because __inet6_lookup_skb() is used by TCP and DCCP, we add an iif parameter to it. Signed-off-by: Eric Dumazet <edumazet@google.com> Fixes: 971f10eca186 ("tcp: better TCP_SKB_CB layout to reduce cache line misses") Acked-by: Cong Wang <cwang@twopensource.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-10-18sfc: add support for skb->xmit_moreEdward Cree2-29/+43
Don't ring the doorbell, and don't do PIO. This will also prevent TX Push, because there will be more than one buffer waiting when the doorbell is rung. Signed-off-by: Edward Cree <ecree@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-10-18r8152: return -EBUSY for runtime suspendhayeswang1-7/+15
Remove calling cancel_delayed_work_sync() for runtime suspend, because it would cause dead lock. Instead, return -EBUSY to avoid the device enters suspending if the net is running and the delayed work is pending or running. The delayed work would try to wake up the device later, so the suspending is not necessary. Signed-off-by: Hayes Wang <hayeswang@realtek.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-10-18ipv4: fix a potential use after free in fou.cLi RongQing1-0/+3
pskb_may_pull() maybe change skb->data and make uh pointer oboslete, so reload uh and guehdr Fixes: 37dd0247 ("gue: Receive side for Generic UDP Encapsulation") Cc: Tom Herbert <therbert@google.com> Signed-off-by: Li RongQing <roy.qing.li@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-10-18ipv4: fix a potential use after free in ip_tunnel_core.cLi RongQing1-1/+2
pskb_may_pull() maybe change skb->data and make eth pointer oboslete, so set eth after pskb_may_pull() Fixes:3d7b46cd("ip_tunnel: push generic protocol handling to ip_tunnel module") Cc: Pravin B Shelar <pshelar@nicira.com> Signed-off-by: Li RongQing <roy.qing.li@gmail.com> Acked-by: Pravin B Shelar <pshelar@nicira.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-10-18hyperv: Add handling of IP header with option field in netvsc_set_hash()Haiyang Zhang1-16/+10
In case that the IP header has optional field at the end, this patch will get the port numbers after that field, and compute the hash. The general parser skb_flow_dissect() is used here. Signed-off-by: Haiyang Zhang <haiyangz@microsoft.com> Reviewed-by: K. Y. Srinivasan <kys@microsoft.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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