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* arm64: dts: sdm845: Introduce ADSP and CDSP PAS nodesBjorn Andersson2019-04-232-0/+66
| | | | | | | | | | | Add the Audio DSP (ADSP) and Compute DSP (CDSP) nodes for TrustZone based remoteproc, supporting booting these cores on e.g. the MTP, and enable the same for the MTP. Tested-by: Sibi Sankar <sibis@codeaurora.org> Reviewed-by: Sibi Sankar <sibis@codeaurora.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <agross@kernel.org>
* arm64: dts: qcom: sdm845: Define rmtfs memoryBjorn Andersson2019-04-231-0/+9
| | | | | | | | | | | Define the rmtfs memory node. As the memory region specified in version 10 of the memory map is only 1MB a chunk of unallocated memory is chosen. Tested-by: Sibi Sankar <sibis@codeaurora.org> Reviewed-by: Sibi Sankar <sibis@codeaurora.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <agross@kernel.org>
* arm64: dts: qcom: sdm845: Update reserved memory mapBjorn Andersson2019-04-231-7/+67
| | | | | | | | | Update existing and add missing regions to the reserved memory map, as described in version 10. Reviewed-by: Sibi Sankar <sibis@codeaurora.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <agross@kernel.org>
* arm64: dts: sdm845: Add UFS PHY resetEvan Green2019-04-231-0/+3
| | | | | | | | | | Wire up the reset controller in the Qcom UFS controller for the PHY. This will be used to toggle PHY reset during initialization of the PHY. Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Evan Green <evgreen@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <agross@kernel.org>
* arm64: dts: qcom: msm8998: Fix blsp2_i2c5 addressMarc Gonzalez2019-04-191-1/+1
| | | | | | | | | | blsp1_i2c1 is at 0x0c175000 blsp2_i2c5 is at 0x0c1ba000 (the label is correct) Fixes: 1e71d0c273d0a ("arm64: dts: qcom: msm8998: Enumerate i2c controllers") Signed-off-by: Marc Gonzalez <marc.w.gonzalez@free.fr> Reviewed-by: Jeffrey Hugo <jhugo@codeaurora.org> Signed-off-by: Andy Gross <agross@kernel.org>
* arm64: dts: qcom: qcs404-evb: Change the compatible to distinguish platformsKhasim Syed Mohammed2019-04-192-2/+4
| | | | | | | | | The compatible flag should be different for each board to match with the dtb and to let the bootloader pick the appropriate dtb. Signed-off-by: Khasim Syed Mohammed <khasim.mohammed@linaro.org> Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org> Signed-off-by: Andy Gross <agross@kernel.org>
* arm64: dts: qcom: pmi8998: add gpio-rangesBrian Masney2019-04-191-0/+1
| | | | | | | | | | | | This adds the gpio-ranges property so that the GPIO pins are initialized by the GPIO framework and not pinctrl. This fixes a circular dependency between these two frameworks so GPIO hogging can be used on this board. This was not tested on this particular hardware, however this same change was tested on qcom-pm8941 using a LG Nexus 5 (hammerhead) phone. Signed-off-by: Brian Masney <masneyb@onstation.org> Signed-off-by: Andy Gross <agross@kernel.org>
* arm64: dts: qcom: pmi8994: add gpio-rangesBrian Masney2019-04-191-0/+1
| | | | | | | | | | | | This adds the gpio-ranges property so that the GPIO pins are initialized by the GPIO framework and not pinctrl. This fixes a circular dependency between these two frameworks so GPIO hogging can be used on this board. This was not tested on this particular hardware, however this same change was tested on qcom-pm8941 using a LG Nexus 5 (hammerhead) phone. Signed-off-by: Brian Masney <masneyb@onstation.org> Signed-off-by: Andy Gross <agross@kernel.org>
* arm64: dts: qcom: pm8998: add gpio-rangesBrian Masney2019-04-191-0/+1
| | | | | | | | | | | | This adds the gpio-ranges property so that the GPIO pins are initialized by the GPIO framework and not pinctrl. This fixes a circular dependency between these two frameworks so GPIO hogging can be used on this board. This was not tested on this particular hardware, however this same change was tested on qcom-pm8941 using a LG Nexus 5 (hammerhead) phone. Signed-off-by: Brian Masney <masneyb@onstation.org> Signed-off-by: Andy Gross <agross@kernel.org>
* arm64: dts: qcom: pm8005: add gpio-rangesBrian Masney2019-04-191-0/+1
| | | | | | | | | | | | This adds the gpio-ranges property so that the GPIO pins are initialized by the GPIO framework and not pinctrl. This fixes a circular dependency between these two frameworks so GPIO hogging can be used on this board. This was not tested on this particular hardware, however this same change was tested on qcom-pm8941 using a LG Nexus 5 (hammerhead) phone. Signed-off-by: Brian Masney <masneyb@onstation.org> Signed-off-by: Andy Gross <agross@kernel.org>
* arm64: dts: msm8998: Add UFS phy resetMarc Gonzalez2019-04-101-0/+4
| | | | | | | | Fixup MSM8998 UFS DT nodes now that Evan's reset series has landed. https://lore.kernel.org/lkml/20190321171800.104681-1-evgreen@chromium.org/ Signed-off-by: Marc Gonzalez <marc.w.gonzalez@free.fr> Signed-off-by: Andy Gross <agross@kernel.org>
* Merge branch 'arm64-thermal-for-5.2' into arm64-for-5.2Andy Gross2019-04-104-73/+589
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| * arm64: dts: msm8916: thermal: Convert camera trip type to hotAmit Kucheria2019-04-101-6/+1
| | | | | | | | | | | | | | | | | | We don't have any cooling-devices related to the camera. Use the "hot" trip type so allow the temperature to be exported to userspace and remove the "critical" trip. Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> Signed-off-by: Andy Gross <agross@kernel.org>
| * arm64: dts: msm8996: thermal: Make trip names consistentAmit Kucheria2019-04-101-12/+12
| | | | | | | | | | | | | | | | Maintain naming consistency with what was landed for sdm845. Simplifies parsing for test tools. Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> Signed-off-by: Andy Gross <agross@kernel.org>
| * arm64: dts: msm8916: thermal: Make trip names consistentAmit Kucheria2019-04-101-12/+12
| | | | | | | | | | | | | | | | Maintain naming consistency with what was landed for sdm845. Simplifies parsing for test tools. Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> Signed-off-by: Andy Gross <agross@kernel.org>
| * arm64: dts: msm8998: thermal: Make trip names consistentAmit Kucheria2019-04-101-24/+24
| | | | | | | | | | | | | | | | Maintain naming consistency with what was landed for sdm845. Simplifies parsing for test tools. Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> Signed-off-by: Andy Gross <agross@kernel.org>
| * arm64: dts: sdm845: thermal: Add temperature sensors near major peripheralsAmit Kucheria2019-04-101-0/+205
| | | | | | | | | | | | | | | | sdm845 has a total of 21 temperature sensors. Populate DT with information about them. Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> Signed-off-by: Andy Gross <agross@kernel.org>
| * arm64: dts: msm8998: thermal: Add temperature sensors near major peripheralsAmit Kucheria2019-04-101-0/+135
| | | | | | | | | | | | | | | | msm8998 has a total of 22 temperature sensors. Populate DT with information about them. Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> Signed-off-by: Andy Gross <agross@kernel.org>
| * arm64: dts: msm8998: thermal: GPU has two sensors, add the secondAmit Kucheria2019-04-101-1/+24
| | | | | | | | | | | | | | The first sensor is on top and the second sensor below the GPU Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> Signed-off-by: Andy Gross <agross@kernel.org>
| * arm64: dts: msm8998: thermal: Fix the gpu sensor numberAmit Kucheria2019-04-101-1/+1
| | | | | | | | | | | | | | | | The GPU sensor is sensor ID 13 on controller 0 Fixes: 4449b6f248d9a1 ("arm64: dts: qcom: msm8998: Add tsens and thermal-zones") Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> Signed-off-by: Andy Gross <agross@kernel.org>
| * arm64: dts: msm8998: thermal: Fix the cpu sensor numbersAmit Kucheria2019-04-101-8/+8
| | | | | | | | | | | | | | | | | | | | The silver cluster (typically cpu0-3) are monitored by sensor IDs 1-3 on tsens controller 0. The gold cluster (typically cpu4-7) are monitored by sensor IDs 7-10 on tsens controller 0. Fixes: 4449b6f248d9a1 ("arm64: dts: qcom: msm8998: Add tsens and thermal-zones") Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> Signed-off-by: Andy Gross <agross@kernel.org>
| * arm64: dts: msm8996: thermal: Add temperature sensors near major peripheralsAmit Kucheria2019-04-101-0/+150
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | msm8996 has a total of 21 temperature sensors. Populate DT with information about them. There are 2 sensors on each of the cpus - one on the top, the other below (we only expose one on the top in DT for now). For the GPU, we expose both, the one on the top and the one below. Depending on the version of the silicon, sensor 2 is either placed near the L3 cache or the venus video decoder. It would've been nice to be able to be version-specific but we don't have DTs that differentiate the two versions of silicon yet. Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> Signed-off-by: Andy Gross <agross@kernel.org>
| * arm64: dts: msm8916: thermal: Add sensor for modemAmit Kucheria2019-04-101-0/+14
| | | | | | | | | | | | | | On platforms that have a modem, sensor 0 monitors the modem. Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> Signed-off-by: Andy Gross <agross@kernel.org>
| * arm64: dts: msm8998: efficiency is not valid propertyAmit Kucheria2019-04-101-8/+0
| | | | | | | | | | | | | | | | | | efficiency comes from downstream. The valid upstream property is capacity-dmips-mhz but until we can come up with those numbers, remove this property. Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> Signed-off-by: Andy Gross <agross@kernel.org>
| * arm64: dts: msm8998: thermal: split address space into twoAmit Kucheria2019-04-101-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | We've earlier added support to split the register address space into TM and SROT regions. Split up the regmap address space into two for msm8998 that has a similar register layout. The order is important (TM before SROT) because we make an assumption that SROT is always the second address space in order to support legacy DTs. Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> Signed-off-by: Andy Gross <agross@kernel.org>
* | arm64: dts: sdm845: Include rpmpd DT headerRajendra Nayak2019-03-281-10/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | In order to fix dependencies with rpmpd DT entries, the header was dropped and hardcoded values were added for opp-level, during the previous merge window. Add the header back in now and remove the hardcodings, effectively reverting commit '08585d21de9875a6064b350957faa0460a4c69a6: arm64: dts: sdm845: Fixup dependency on RPMPD includes' Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
* | arm64: dts: qcom: qcs404-evb: Enable uart3 and add BluetoothBjorn Andersson2019-03-281-0/+45
| | | | | | | | | | | | | | | | | | | | | | | | Enable blsp1_uart3, define its pinconf and add the bluetooth node. It seems provisioning is lacking a valid BD address, preventing the interface from initializing, so provide a dummy for now. Tested-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
* | arm64: dts: qcom: qcs404-evb: add spmi regulatorsJorge Ramirez-Ortiz2019-03-281-0/+12
| | | | | | | | | | | | | | | | | | | | Define the EVB pms405_s3 supplies. Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org> Signed-off-by: Khasim Syed Mohammed <khasim.mohammed@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
* | arm64: dts: qcom: pms405: add spmi regulatorsJorge Ramirez-Ortiz2019-03-281-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | The PMS405 sports 5 SMPS and 13 LDO regulators, add the regulators to pms405 DTS. Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org> Signed-off-by: Khasim Syed Mohammed <khasim.mohammed@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> [bjorn: updated label] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
* | arm64: dts: qcom: msm8998: Add UFS nodesMarc Gonzalez2019-03-282-0/+84
| | | | | | | | | | | | | | | | | | Add host controller and PHY DT nodes. Tested-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Marc Gonzalez <marc.w.gonzalez@free.fr> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
* | arm64: dts: qcom: msm8998: Allow UFSHC driver to set-loadMarc Gonzalez2019-03-281-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | The UFS host controller driver needs to set the load on 3 power rails (l20, l26, s4) but the operation fails silently unless we specify the regulator-allow-set-load property in the corresponding DT nodes. Tested-by: Lee Jones <lee.jones@linaro.org> Reviewed-by: Jeffrey Hugo <jhugo@codeaurora.org> Signed-off-by: Marc Gonzalez <marc.w.gonzalez@free.fr> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
* | arm64: dts: qcom: qcs404: Remove default setting of controlled-remotely for ↵Khasim Syed Mohammed2019-03-282-2/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | BAM DMA The property controlled-remotely should not be set by default for qcs-404 device, it should be set based on the secure boot options (TZ or ATF) preferred by the platform. Hence, the controlled-remotely property is moved to platform specific dts files. Signed-off-by: Khasim Syed Mohammed <khasim.mohammed@linaro.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
* | arm64: dts: qcom: qcs404: Fix voltages l3Bjorn Andersson2019-03-281-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | PMS405 L3 is outside the acceptable range, causing PCIe to fail. Fix these. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Khasim Syed Mohammed <khasim.mohammed@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> [bjorn: Hunk fixing up S5 already applied, updated commit message] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
* | arm64: dts: qcom: qcs404: Enable ethernet for EVB-4000Vinod Koul2019-03-281-0/+82
| | | | | | | | | | | | | | | | | | | | EVB-4000 comes with ethernet so enable it and add pinctrl bindings. Co-developed-by: Niklas Cassel <niklas.cassel@linaro.org> Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
* | arm64: dts: qcom: qcs404: Add Ethernet nodeVinod Koul2019-03-281-0/+21
| | | | | | | | | | | | | | | | | | | | Add the ethernet node found in QCS404 platform. Co-developed-by: Niklas Cassel <niklas.cassel@linaro.org> Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
* | arm64: dts: sdm845: Include the interconnect resources DT headerGeorgi Djakov2019-03-281-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Include the device tree header for the on-chip interconnect endpoint resources on sdm845 devices. This will allow using the "interconnects" property in DT nodes to describe the interconnect path resources they use. The sdm845 interconnect provider DT node is already present, but the header file with the resources is not included, so let's fix this. Reviewed-by: Evan Green <evgreen@chromium.org> Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
* | arm64: dts: qcom: qcs404: Fix regulator supply namesBjorn Andersson2019-03-281-14/+14
|/ | | | | | | | | | | | | | The regulator definition got their supply names cleaned up during upstreaming, so they no longer match the driver defined names. Update the supply names. Also fill out the missing voltage of SMPS 5. Fixes: 0b363f5b871c ("arm64: dts: qcom: qcs404: Add PMS405 RPM regulators") Reported-by: Nicolas Dechesne <nicolas.dechesne@linaro.org> Reviewed-by: Niklas Cassel <niklas.cassel@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
* Merge tag 'kbuild-v5.1-2' of ↵Linus Torvalds2019-03-171-1/+0
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild Pull more Kbuild updates from Masahiro Yamada: - add more Build-Depends to Debian source package - prefix header search paths with $(srctree)/ - make modpost show verbose section mismatch warnings - avoid hard-coded CROSS_COMPILE for h8300 - fix regression for Debian make-kpkg command - add semantic patch to detect missing put_device() - fix some warnings of 'make deb-pkg' - optimize NOSTDINC_FLAGS evaluation - add warnings about redundant generic-y - clean up Makefiles and scripts * tag 'kbuild-v5.1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild: kconfig: remove stale lxdialog/.gitignore kbuild: force all architectures except um to include mandatory-y kbuild: warn redundant generic-y Revert "modsign: Abort modules_install when signing fails" kbuild: Make NOSTDINC_FLAGS a simply expanded variable kbuild: deb-pkg: avoid implicit effects coccinelle: semantic code search for missing put_device() kbuild: pkg: grep include/config/auto.conf instead of $KCONFIG_CONFIG kbuild: deb-pkg: introduce is_enabled and if_enabled_echo to builddeb kbuild: deb-pkg: add CONFIG_ prefix to kernel config options kbuild: add workaround for Debian make-kpkg kbuild: source include/config/auto.conf instead of ${KCONFIG_CONFIG} unicore32: simplify linker script generation for decompressor h8300: use cc-cross-prefix instead of hardcoding h8300-unknown-linux- kbuild: move archive command to scripts/Makefile.lib modpost: always show verbose warning for section mismatch ia64: prefix header search path with $(srctree)/ libfdt: prefix header search paths with $(srctree)/ deb-pkg: generate correct build dependencies
| * kbuild: force all architectures except um to include mandatory-yMasahiro Yamada2019-03-171-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | Currently, every arch/*/include/uapi/asm/Kbuild explicitly includes the common Kbuild.asm file. Factor out the duplicated include directives to scripts/Makefile.asm-generic so that no architecture would opt out of the mandatory-y mechanism. um is not forced to include mandatory-y since it is a very exceptional case which does not support UAPI. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds2019-03-1511-85/+188
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull KVM updates from Paolo Bonzini: "ARM: - some cleanups - direct physical timer assignment - cache sanitization for 32-bit guests s390: - interrupt cleanup - introduction of the Guest Information Block - preparation for processor subfunctions in cpu models PPC: - bug fixes and improvements, especially related to machine checks and protection keys x86: - many, many cleanups, including removing a bunch of MMU code for unnecessary optimizations - AVIC fixes Generic: - memcg accounting" * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (147 commits) kvm: vmx: fix formatting of a comment KVM: doc: Document the life cycle of a VM and its resources MAINTAINERS: Add KVM selftests to existing KVM entry Revert "KVM/MMU: Flush tlb directly in the kvm_zap_gfn_range()" KVM: PPC: Book3S: Add count cache flush parameters to kvmppc_get_cpu_char() KVM: PPC: Fix compilation when KVM is not enabled KVM: Minor cleanups for kvm_main.c KVM: s390: add debug logging for cpu model subfunctions KVM: s390: implement subfunction processor calls arm64: KVM: Fix architecturally invalid reset value for FPEXC32_EL2 KVM: arm/arm64: Remove unused timer variable KVM: PPC: Book3S: Improve KVM reference counting KVM: PPC: Book3S HV: Fix build failure without IOMMU support Revert "KVM: Eliminate extra function calls in kvm_get_dirty_log_protect()" x86: kvmguest: use TSC clocksource if invariant TSC is exposed KVM: Never start grow vCPU halt_poll_ns from value below halt_poll_ns_grow_start KVM: Expose the initial start value in grow_halt_poll_ns() as a module parameter KVM: grow_halt_poll_ns() should never shrink vCPU halt_poll_ns KVM: x86/mmu: Consolidate kvm_mmu_zap_all() and kvm_mmu_zap_mmio_sptes() KVM: x86/mmu: WARN if zapping a MMIO spte results in zapping children ...
| * Merge tag 'kvmarm-for-v5.1' of ↵Paolo Bonzini2019-02-2211-85/+188
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into kvm-next KVM/arm updates for Linux v5.1 - A number of pre-nested code rework - Direct physical timer assignment on VHE systems - kvm_call_hyp type safety enforcement - Set/Way cache sanitisation for 32bit guests - Build system cleanups - A bunch of janitorial fixes
| | * arm64: KVM: Fix architecturally invalid reset value for FPEXC32_EL2Dave Martin2019-02-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Due to what looks like a typo dating back to the original addition of FPEXC32_EL2 handling, KVM currently initialises this register to an architecturally invalid value. As a result, the VECITR field (RES1) in bits [10:8] is initialised with 0, and the two reserved (RES0) bits [6:5] are initialised with 1. (In the Common VFP Subarchitecture as specified by ARMv7-A, these two bits were IMP DEF. ARMv8-A removes them.) This patch changes the reset value from 0x70 to 0x700, which reflects the architectural constraints and is presumably what was originally intended. Cc: <stable@vger.kernel.org> # 4.12.x- Cc: Christoffer Dall <christoffer.dall@arm.com> Fixes: 62a89c44954f ("arm64: KVM: 32bit handling of coprocessor traps") Signed-off-by: Dave Martin <Dave.Martin@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
| | * KVM: arm64: Fix comment for KVM_PHYS_SHIFTZenghui Yu2019-02-191-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since Suzuki K Poulose's work on Dynamic IPA support, KVM_PHYS_SHIFT will be used only when machine_type's bits[7:0] equal to 0 (by default). Thus the outdated comment should be fixed. Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Zenghui Yu <yuzenghui@huawei.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
| | * KVM: arm/arm64: Prefix header search paths with $(srctree)/Masahiro Yamada2019-02-191-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, the Kbuild core manipulates header search paths in a crazy way [1]. To fix this mess, I want all Makefiles to add explicit $(srctree)/ to the search paths in the srctree. Some Makefiles are already written in that way, but not all. The goal of this work is to make the notation consistent, and finally get rid of the gross hacks. Having whitespaces after -I does not matter since commit 48f6e3cf5bc6 ("kbuild: do not drop -I without parameter"). [1]: https://patchwork.kernel.org/patch/9632347/ Acked-by: Christoffer Dall <christoffer.dall@arm.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
| | * KVM: arm/arm64: Remove -I. header search pathsMasahiro Yamada2019-02-191-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The header search path -I. in kernel Makefiles is very suspicious; it allows the compiler to search for headers in the top of $(srctree), where obviously no header file exists. I was able to build without these extra header search paths. Acked-by: Christoffer Dall <christoffer.dall@arm.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
| | * arm64: KVM: Describe data or unified caches as having 1 set and 1 wayArd Biesheuvel2019-02-192-1/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On SMP ARM systems, cache maintenance by set/way should only ever be done in the context of onlining or offlining CPUs, which is typically done by bare metal firmware and never in a virtual machine. For this reason, we trap set/way cache maintenance operations and replace them with conditional flushing of the entire guest address space. Due to this trapping, the set/way arguments passed into the set/way ops are completely ignored, and thus irrelevant. This also means that the set/way geometry is equally irrelevant, and we can simply report it as 1 set and 1 way, so that legacy 32-bit ARM system software (i.e., the kind that only receives odd fixes) doesn't take a performance hit due to the trapping when iterating over the cachelines. Acked-by: Christoffer Dall <christoffer.dall@arm.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
| | * arm64: KVM: Expose sanitised cache type register to guestArd Biesheuvel2019-02-193-2/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We currently permit CPUs in the same system to deviate in the exact topology of the caches, and we subsequently hide this fact from user space by exposing a sanitised value of the cache type register CTR_EL0. However, guests running under KVM see the bare value of CTR_EL0, which could potentially result in issues with, e.g., JITs or other pieces of code that are sensitive to misreported cache line sizes. So let's start trapping cache ID instructions if there is a mismatch, and expose the sanitised version of CTR_EL0 to guests. Note that CTR_EL0 is treated as an invariant to KVM user space, so update that part as well. Acked-by: Christoffer Dall <christoffer.dall@arm.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
| | * KVM: arm/arm64: Move kvm_is_write_fault to header fileChristoffer Dall2019-02-191-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | Move this little function to the header files for arm/arm64 so other code can make use of it directly. Signed-off-by: Christoffer Dall <christoffer.dall@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
| | * KVM: arm/arm64: consolidate arch timer trap handlersAndre Przywara2019-02-192-40/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At the moment we have separate system register emulation handlers for each timer register. Actually they are quite similar, and we rely on kvm_arm_timer_[gs]et_reg() for the actual emulation anyways, so let's just merge all of those handlers into one function, which just marshalls the arguments and then hands off to a set of common accessors. This makes extending the emulation to include EL2 timers much easier. Signed-off-by: Andre Przywara <andre.przywara@arm.com> [Fixed 32-bit VM breakage and reduced to reworking existing code] Signed-off-by: Christoffer Dall <christoffer.dall@arm.com> [Fixed 32bit host, general cleanup] Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
| | * KVM: arm64: Reuse sys_reg() macro when searching the trap tableMarc Zyngier2019-02-191-13/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of having an open-coded macro, reuse the sys_reg() macro that does the exact same thing (the encoding is slightly different, but the ordering property is the same). Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Christoffer Dall <christoffer.dall@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@arm.com>
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