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path: root/drivers/clk/socfpga/clk-s10.c (follow)
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* clk: socfpga: cleanup spdx tagsTom Rix2022-03-121-1/+1
| | | | | | | | | Replace tabs with spaces in SPDX tag Signed-off-by: Tom Rix <trix@redhat.com> Link: https://lore.kernel.org/r/20220217173453.3262672-1-trix@redhat.com Acked-by: Dinh Nguyen <dinguyen@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
* clk: socfpga: s10: Make use of the helper function ↵Cai Huoqing2022-01-061-3/+1
| | | | | | | | | | | | devm_platform_ioremap_resource() Use the devm_platform_ioremap_resource() helper instead of calling platform_get_resource() and devm_ioremap_resource() separately Signed-off-by: Cai Huoqing <caihuoqing@baidu.com> Link: https://lore.kernel.org/r/20210907085144.4458-1-caihuoqing@baidu.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
* clk: agilex/stratix10: fix bypass representationDinh Nguyen2021-06-281-10/+45
| | | | | | | | | | | | | | Each of these clocks(s2f_usr0/1, sdmmc_clk, gpio_db, emac_ptp, emac0/1/2) have a bypass setting that can use the boot_clk. The previous representation was not correct. Fix the representation. Fixes: 80c6b7a0894f ("clk: socfpga: agilex: add clock driver for the Agilex platform") Cc: stable@vger.kernel.org Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> Link: https://lore.kernel.org/r/20210611025201.118799-2-dinguyen@kernel.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
* clk: agilex/stratix10: remove noc_clkDinh Nguyen2021-06-281-17/+15
| | | | | | | | | | | Early documentation had a noc_clk, but in reality, it's just the noc_free_clk. Remove the noc_clk clock and just use the noc_free_clk. Fixes: 80c6b7a0894f ("clk: socfpga: agilex: add clock driver for the Agilex platform") Cc: stable@vger.kernel.org Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> Link: https://lore.kernel.org/r/20210611025201.118799-1-dinguyen@kernel.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
* clk: socfpga: Convert to s10/agilex/n5x to use clk_hwDinh Nguyen2021-03-311-39/+29
| | | | | | | | | | As recommended by Stephen Boyd, convert the Agilex/Stratix10/n5x clock driver to use the clk_hw registration method. Suggested-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> Link: https://lore.kernel.org/r/20210302214151.1333447-3-dinguyen@kernel.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
* clk: socfpga: stratix10: fix the divider for the emac_ptp_free_clkDinh Nguyen2020-09-221-1/+1
| | | | | | | | | | | The fixed divider the emac_ptp_free_clk should be 2, not 4. Fixes: 07afb8db7340 ("clk: socfpga: stratix10: add clock driver for Stratix10 platform") Cc: stable@vger.kernel.org Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> Link: https://lore.kernel.org/r/20200831202657.8224-1-dinguyen@kernel.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
* clk: socfpga: stratix10: use new parent data schemeDinh Nguyen2020-05-271-29/+131
| | | | | | | | | | Convert, where possible, the stratix10 clock driver to the new parent data scheme by specifying the parent data for clocks that have multiple parents. Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> Link: https://lkml.kernel.org/r/20200512181647.5071-1-dinguyen@kernel.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
* clk: socfpga: stratix10: simplify parameter passingDinh Nguyen2020-02-131-25/+4
| | | | | | | | Just pass the clock pointer structure to the various register functions. Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> Link: https://lkml.kernel.org/r/20200114160726.19771-2-dinguyen@kernel.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
* clk: socfpga: stratix10: fix divider entry for the emac clocksDinh Nguyen2019-06-251-2/+2
| | | | | | | The fixed dividers for the emac clocks should be 2 not 4. Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
* clk: socfpga: stratix10: add additional clocks needed for the NAND IPDinh Nguyen2019-06-251-1/+5
| | | | | | | | | | The nand_clk is actually called the nand_x_clk and the parent is the l4_mp_clk, not the l4_main_clk. The nand_clk is a child of the nand_x_clk and has a fixed divider of 4. The same is true for the nand_ecc_clk. Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
* clk: socfpga: stratix10: fix naming convention for the fixed-clocksDinh Nguyen2019-01-151-10/+10
| | | | | | | | | | | | The fixed clocks in the DTS file have a hyphen, but the clock driver has the fixed clocks using underbar. Thus the clock driver cannot detect the other fixed clocks correctly. Change the fixed clock names to a hyphen. Fixes: 07afb8db7340 ("clk: socfpga: stratix10: add clock driver for Stratix10 platform") Cc: linux-stable@vger.kernel.org Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
* clk: socfpga: stratix10: fix the sdmmc_free_clk muxDinh Nguyen2018-07-061-1/+1
| | | | | | | The first parent of the sdmmc_free_clk should be the main_sdmmc_clk. Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
* clk: socfpga: stratix10: fix the parents of mpu_free_clkDinh Nguyen2018-07-061-1/+6
| | | | | | | Add a clock mux that is used as a parent for the mpu_free_clk. Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
* clk: socfpga: stratix10: suppress unbinding platform's clock driverDinh Nguyen2018-05-151-0/+1
| | | | | | | | The Stratix10 clock driver is essential to system operation, so their removal should never happen. Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
* clk: socfpga: stratix10: use platform driver APIsDinh Nguyen2018-05-151-22/+17
| | | | | | | | | | Use platform driver APIs to map memory so that it will automatically free the memory in case of errors. Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> [sboyd@kernel.org: Return -ENOMEM error pointers, check for error pointer at call site] Signed-off-by: Stephen Boyd <sboyd@kernel.org>
* clk: socfpga: stratix10: add clock driver for Stratix10 platformDinh Nguyen2018-04-061-0/+345
Add a clock driver for the Stratix10 SoC. The driver is similar to the Cyclone5/Arria10 platforms, with the exception that this driver only uses one single clock binding. Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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