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* net: phy: micrel: Dynamically control external clock of KSZ PHYWei Fang2024-12-201-13/+101
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On the i.MX6ULL-14x14-EVK board, enet1_ref and enet2_ref are used as the clock sources for two external KSZ PHYs. However, after closing the two FEC ports, the clk_enable_count of the enet1_ref and enet2_ref clocks is not 0. The root cause is that since the commit 985329462723 ("net: phy: micrel: use devm_clk_get_optional_enabled for the rmii-ref clock"), the external clock of KSZ PHY has been enabled when the PHY driver probes, and it can only be disabled when the PHY driver is removed. This causes the clock to continue working when the system is suspended or the network port is down. Although Heiko explained in the commit message that the patch was because some clock suppliers need to enable the clock to get the valid clock rate , it seems that the simple fix is to disable the clock after getting the clock rate to solve the current problem. This is indeed true, but we need to admit that Heiko's patch has been applied for more than a year, and we cannot guarantee whether there are platforms that only enable rmii-ref in the KSZ PHY driver during this period. If this is the case, disabling rmii-ref will cause RMII on these platforms to not work. Secondly, commit 99ac4cbcc2a5 ("net: phy: micrel: allow usage of generic ethernet-phy clock") just simply enables the generic clock permanently, which seems like the generic clock may only be enabled in the PHY driver. If we simply disable the generic clock, RMII may not work. If we keep it as it is, the platform using the generic clock will have the same problem as the i.MX6ULL platform. To solve this problem, the clock is enabled when phy_driver::resume() is called, and the clock is disabled when phy_driver::suspend() is called. Since phy_driver::resume() and phy_driver::suspend() are not called in pairs, an additional clk_enable flag is added. When phy_driver::suspend() is called, the clock is disabled only if clk_enable is true. Conversely, when phy_driver::resume() is called, the clock is enabled if clk_enable is false. The changes that introduced the problem were only a few lines, while the current fix is about a hundred lines, which seems out of proportion, but it is necessary because kszphy_probe() is used by multiple KSZ PHYs and we need to fix all of them. Fixes: 985329462723 ("net: phy: micrel: use devm_clk_get_optional_enabled for the rmii-ref clock") Fixes: 99ac4cbcc2a5 ("net: phy: micrel: allow usage of generic ethernet-phy clock") Signed-off-by: Wei Fang <wei.fang@nxp.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Link: https://patch.msgid.link/20241217063500.1424011-1-wei.fang@nxp.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
* net: phy: avoid undefined behavior in *_led_polarity_set()Arnd Bergmann2024-12-193-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | gcc runs into undefined behavior at the end of the three led_polarity_set() callback functions if it were called with a zero 'modes' argument and it just ends the function there without returning from it. This gets flagged by 'objtool' as a function that continues on to the next one: drivers/net/phy/aquantia/aquantia_leds.o: warning: objtool: aqr_phy_led_polarity_set+0xf: can't find jump dest instruction at .text+0x5d9 drivers/net/phy/intel-xway.o: warning: objtool: xway_gphy_led_polarity_set() falls through to next function xway_gphy_config_init() drivers/net/phy/mxl-gpy.o: warning: objtool: gpy_led_polarity_set() falls through to next function gpy_led_hw_control_get() There is no point to micro-optimize the behavior here to save a single-digit number of bytes in the kernel, so just change this to a "return -EINVAL" as we do when any unexpected bits are set. Fixes: 1758af47b98c ("net: phy: intel-xway: add support for PHY LEDs") Fixes: 9d55e68b19f2 ("net: phy: aquantia: correctly describe LED polarity override") Fixes: eb89c79c1b8f ("net: phy: mxl-gpy: correctly describe LED polarity") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://patch.msgid.link/20241217081056.238792-1-arnd@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
* net: phy: microchip: Reset LAN88xx PHY to ensure clean link state on ↵Oleksij Rempel2024-12-031-0/+21
| | | | | | | | | | | | | | | | | LAN7800/7850 Fix outdated MII_LPA data in the LAN88xx PHY, which is used in LAN7800 and LAN7850 USB Ethernet controllers. Due to a hardware limitation, the PHY cannot reliably update link status after parallel detection when the link partner does not support auto-negotiation. To mitigate this, add a PHY reset in `lan88xx_link_change_notify()` when `phydev->state` is `PHY_NOLINK`, ensuring the PHY starts in a clean state and reports accurate fixed link parallel detection results. Fixes: 792aec47d59d9 ("add microchip LAN88xx phy driver") Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Link: https://patch.msgid.link/20241125084050.414352-1-o.rempel@pengutronix.de Signed-off-by: Jakub Kicinski <kuba@kernel.org>
* net: phy: fix phy_ethtool_set_eee() incorrectly enabling LPIRussell King (Oracle)2024-11-282-13/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When phy_ethtool_set_eee_noneg() detects a change in the LPI parameters, it attempts to update phylib state and trigger the link to cycle so the MAC sees the updated parameters. However, in doing so, it sets phydev->enable_tx_lpi depending on whether the EEE configuration allows the MAC to generate LPI without taking into account the result of negotiation. This can be demonstrated with a 1000base-T FD interface by: # ethtool --set-eee eno0 advertise 8 # cause EEE to be not negotiated # ethtool --set-eee eno0 tx-lpi off # ethtool --set-eee eno0 tx-lpi on This results in being true, despite EEE not having been negotiated and: # ethtool --show-eee eno0 EEE status: enabled - inactive Tx LPI: 250 (us) Supported EEE link modes: 100baseT/Full 1000baseT/Full Advertised EEE link modes: 100baseT/Full 1000baseT/Full Fix this by keeping track of whether EEE was negotiated via a new eee_active member in struct phy_device, and include this state in the decision whether phydev->enable_tx_lpi should be set. Fixes: 3e43b903da04 ("net: phy: Immediately call adjust_link if only tx_lpi_enabled changes") Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Link: https://patch.msgid.link/E1tErSe-005RhB-2R@rmk-PC.armlinux.org.uk Signed-off-by: Paolo Abeni <pabeni@redhat.com>
* net: phy: ensure that genphy_c45_an_config_eee_aneg() sees new value of ↵Heiner Kallweit2024-11-241-10/+14
| | | | | | | | | | | | | | | phydev->eee_cfg.eee_enabled This is a follow-up to 41ffcd95015f ("net: phy: fix phylib's dual eee_enabled") and resolves an issue with genphy_c45_an_config_eee_aneg() (called from genphy_c45_ethtool_set_eee) not seeing the new value of phydev->eee_cfg.eee_enabled. Fixes: 49168d1980e2 ("net: phy: Add phy_support_eee() indicating MAC support EEE") Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Reported-by: Choong Yong Liang <yong.liang.choong@linux.intel.com> Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
* Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netPaolo Abeni2024-11-193-8/+20
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge in late fixes to prepare for the 6.13 net-next PR. Conflicts: include/linux/phy.h 41ffcd95015f net: phy: fix phylib's dual eee_enabled 721aa69e708b net: phy: convert eee_broken_modes to a linkmode bitmap https://lore.kernel.org/all/20241118135512.1039208b@canb.auug.org.au/ drivers/net/ethernet/wangxun/txgbe/txgbe_phy.c 2160428bcb20 net: txgbe: fix null pointer to pcs 2160428bcb20 net: txgbe: remove GPIO interrupt controller Adjacent commits: include/linux/phy.h 41ffcd95015f net: phy: fix phylib's dual eee_enabled 516a5f11eb97 net: phy: respect cached advertising when re-enabling EEE Signed-off-by: Paolo Abeni <pabeni@redhat.com>
| * net: phy: fix phylib's dual eee_enabledRussell King (Oracle)2024-11-152-5/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | phylib has two eee_enabled members. Some parts of the code are using phydev->eee_enabled, other parts are using phydev->eee_cfg.eee_enabled. This leads to incorrect behaviour as their state goes out of sync. ethtool --show-eee shows incorrect information, and --set-eee sometimes doesn't take effect. Fix this by only having one eee_enabled member - that in eee_cfg. Fixes: 49168d1980e2 ("net: phy: Add phy_support_eee() indicating MAC support EEE") Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Reviewed-by: Heiner Kallweit <hkallweit1@gmail.com> Link: https://patch.msgid.link/E1tBXAF-00341F-EQ@rmk-PC.armlinux.org.uk Signed-off-by: Jakub Kicinski <kuba@kernel.org>
| * net: phy: dp83869: fix status reporting for 1000base-x autonegotiationRomain Gantois2024-11-151-3/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DP83869 PHY transceiver supports converting from RGMII to 1000base-x. In this operation mode, autonegotiation can be performed, as described in IEEE802.3. The DP83869 has a set of fiber-specific registers located at offset 0xc00. When the transceiver is configured in RGMII-to-1000base-x mode, these registers are mapped onto offset 0, which should make reading the autonegotiation status transparent. However, the fiber registers at offset 0xc04 and 0xc05 follow the bit layout specified in Clause 37, and genphy_read_status() assumes a Clause 22 layout. Thus, genphy_read_status() doesn't properly read the capabilities advertised by the link partner, resulting in incorrect link parameters. Similarly, genphy_config_aneg() doesn't properly write advertised capabilities. Fix the 1000base-x autonegotiation procedure by replacing genphy_read_status() and genphy_config_aneg() with their Clause 37 equivalents. Fixes: a29de52ba2a1 ("net: dp83869: Add ability to advertise Fiber connection") Cc: stable@vger.kernel.org Signed-off-by: Romain Gantois <romain.gantois@bootlin.com> Link: https://patch.msgid.link/20241112-dp83869-1000base-x-v3-1-36005f4ab0d9@bootlin.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
* | net: phy: microchip_t1: Clause-45 PHY loopback support for LAN887xTarun Alle2024-11-161-0/+1
| | | | | | | | | | | | | | | | | | Adds support for clause-45 PHY loopback for the Microchip LAN887x driver. Signed-off-by: Tarun Alle <Tarun.Alle@microchip.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://patch.msgid.link/20241114101951.382996-1-Tarun.Alle@microchip.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
* | net: phy: convert eee_broken_modes to a linkmode bitmapHeiner Kallweit2024-11-153-20/+15
| | | | | | | | | | | | | | | | | | | | eee_broken_modes has a eee_cap1 register layout currently. This doen't allow to flag e.g. 2.5Gbps or 5Gbps BaseT EEE as broken. To overcome this limitation switch eee_broken_modes to a linkmode bitmap. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Link: https://patch.msgid.link/dfe0c9ff-84b0-4328-86d7-e917ebc084a1@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
* | Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netJakub Kicinski2024-11-141-6/+8
|\| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Cross-merge networking fixes after downstream PR (net-6.12-rc8). Conflicts: tools/testing/selftests/net/.gitignore 252e01e68241 ("selftests: net: add netlink-dumps to .gitignore") be43a6b23829 ("selftests: ncdevmem: Move ncdevmem under drivers/net/hw") https://lore.kernel.org/all/20241113122359.1b95180a@canb.auug.org.au/ drivers/net/phy/phylink.c 671154f174e0 ("net: phylink: ensure PHY momentary link-fails are handled") 7530ea26c810 ("net: phylink: remove "using_mac_select_pcs"") Adjacent changes: drivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c 5b366eae7193 ("stmmac: dwmac-intel-plat: fix call balance of tx_clk handling routines") e96321fad3ad ("net: ethernet: Switch back to struct platform_driver::remove()") Signed-off-by: Jakub Kicinski <kuba@kernel.org>
| * net: phylink: ensure PHY momentary link-fails are handledRussell King (Oracle)2024-11-141-6/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Normally, phylib won't notify changes in quick succession. However, as a result of commit 3e43b903da04 ("net: phy: Immediately call adjust_link if only tx_lpi_enabled changes") this is no longer true - it is now possible that phy_link_down() and phy_link_up() will both complete before phylink's resolver has run, which means it'll miss that pl->phy_state.link momentarily became false. Rename "mac_link_dropped" to be more generic "link_failed" since it will cover more than the MAC/PCS end of the link failing, and arrange to set this in phylink_phy_change() if we notice that the PHY reports that the link is down. This will ensure that we capture an EEE reconfiguration event. Fixes: 3e43b903da04 ("net: phy: Immediately call adjust_link if only tx_lpi_enabled changes") Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Reviewed-by: Oleksij Rempel <o.rempel@pengutronix.de> Link: https://patch.msgid.link/E1tAtcW-002RBS-LB@rmk-PC.armlinux.org.uk Signed-off-by: Jakub Kicinski <kuba@kernel.org>
* | net: phy: c45: don't use temporary linkmode bitmaps in ↵Heiner Kallweit2024-11-141-5/+2
| | | | | | | | | | | | | | | | | | | | | | | | genphy_c45_ethtool_get_eee genphy_c45_eee_is_active() populates both bitmaps only if it returns successfully. So we can avoid the overhead of the temporary bitmaps. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Link: https://patch.msgid.link/b0832102-28ab-4223-b879-91fb1fc11278@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
* | net: phy: mediatek: add MT7530 & MT7531's PHY ID macrosSkyLake.Huang2024-11-131-4/+7
| | | | | | | | | | | | | | | | | | This patch adds MT7530 & MT7531's PHY ID macros in mtk-ge.c so that it follows the same rule of mtk-ge-soc.c. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | net: phy: mediatek: Integrate read/write page helper functionsSkyLake.Huang2024-11-135-28/+26
| | | | | | | | | | | | | | | | This patch integrates read/write page helper functions as MTK phy lib. They are basically the same in mtk-ge.c & mtk-ge-soc.c. Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | net: phy: mediatek: Improve readability of mtk-phy-lib.c's ↵SkyLake.Huang2024-11-131-20/+24
| | | | | | | | | | | | | | | | | | | | | | mtk_phy_led_hw_ctrl_set() This patch removes parens around TRIGGER_NETDEV_RX/TRIGGER_NETDEV_TX in mtk_phy_led_hw_ctrl_set(), which improves readability. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | net: phy: mediatek: Move LED helper functions into mtk phy libSkyLake.Huang2024-11-135-255/+370
| | | | | | | | | | | | | | | | | | | | This patch creates mtk-phy-lib.c & mtk-phy.h and integrates mtk-ge-soc.c's LED helper functions so that we can use those helper functions in other MTK's ethernet phy driver. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | net: phy: mediatek: Re-organize MediaTek ethernet phy driversSkyLake.Huang2024-11-136-18/+27
| | | | | | | | | | | | | | | | | | | | | | | | Re-organize MediaTek ethernet phy driver files and get ready to integrate some common functions and add new 2.5G phy driver. mtk-ge.c: MT7530 Gphy on MT7621 & MT7531 Gphy mtk-ge-soc.c: Built-in Gphy on MT7981 & Built-in switch Gphy on MT7988 mtk-2p5ge.c: Planned for built-in 2.5G phy on MT7988 Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | net: phylink: clean up phylink_resolve()Russell King (Oracle)2024-11-121-19/+16
| | | | | | | | | | | | | | | | | | Now that we have reduced the indentation level, clean up the code formatting. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Link: https://patch.msgid.link/E1t9RQz-002Ff5-EA@rmk-PC.armlinux.org.uk Signed-off-by: Jakub Kicinski <kuba@kernel.org>
* | net: phylink: remove switch() statement in resolve handlingRussell King (Oracle)2024-11-121-49/+45
| | | | | | | | | | | | | | | | | | | | | | | | The switch() statement doesn't sit very well with the preceeding if() statements, so let's just convert everything to if()s. As a result of the two preceding commits, there is now only one case in the switch() statement. Remove the switch statement and reduce the code indentation. Code reformatting will be in the following commit. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Link: https://patch.msgid.link/E1t9RQu-002Fez-AA@rmk-PC.armlinux.org.uk Signed-off-by: Jakub Kicinski <kuba@kernel.org>
* | net: phylink: move MLO_AN_PHY resolve handling to if() statementRussell King (Oracle)2024-11-121-5/+3
| | | | | | | | | | | | | | | | | | | | | | The switch() statement doesn't sit very well with the preceeding if() statements, and results in excessive indentation that spoils code readability. Continue cleaning this up by converting the MLO_AN_PHY case to use an if() statmeent. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Link: https://patch.msgid.link/E1t9RQp-002Fet-5W@rmk-PC.armlinux.org.uk Signed-off-by: Jakub Kicinski <kuba@kernel.org>
* | net: phylink: move MLO_AN_FIXED resolve handling to if() statementRussell King (Oracle)2024-11-121-5/+3
| | | | | | | | | | | | | | | | | | | | | | The switch() statement doesn't sit very well with the preceeding if() statements, and results in excessive indentation that spoils code readability. Begin cleaning this up by converting the MLO_AN_FIXED case to an if() statement. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Link: https://patch.msgid.link/E1t9RQk-002Fen-1A@rmk-PC.armlinux.org.uk Signed-off-by: Jakub Kicinski <kuba@kernel.org>
* | net: phylink: move manual flow control settingRussell King (Oracle)2024-11-121-2/+3
| | | | | | | | | | | | | | | | | | | | Move the handling of manual flow control configuration to a common location during resolve. We currently evaluate this for all but fixed links. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Link: https://patch.msgid.link/E1t9RQe-002Feh-T1@rmk-PC.armlinux.org.uk Signed-off-by: Jakub Kicinski <kuba@kernel.org>
* | net: phy: aquantia: Add mdix config and reportingPaul Davey2024-11-121-0/+52
| | | | | | | | | | | | | | | | | | | | | | Add support for configuring MDI-X state of PHY. Add reporting of resolved MDI-X state in status information. Tested on AQR113C. Signed-off-by: Paul Davey <paul.davey@alliedtelesis.co.nz> Link: https://patch.msgid.link/20241106222057.3965379-1-paul.davey@alliedtelesis.co.nz Signed-off-by: Jakub Kicinski <kuba@kernel.org>
* | net: phy: remove genphy_config_eee_advertHeiner Kallweit2024-11-081-23/+0
| | | | | | | | | | | | | | | | | | | | | | bcm_config_lre_aneg() doesn't use genphy_config_eee_advert() any longer. As this was the only user, we can remove genphy_config_eee_advert() now. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Link: https://patch.msgid.link/37da7f3e-b883-4c07-9881-b8c0516822b7@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
* | net: phy: broadcom: use genphy_c45_an_config_eee_aneg in bcm_config_lre_anegHeiner Kallweit2024-11-081-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | bcm_config_lre_aneg() is the only user of genphy_config_eee_advert(), therefore use genphy_c45_an_config_eee_aneg() instead. The resulting functionality is equivalent, and bcm_config_lre_aneg() follows the structure of __genphy_config_aneg(). In a follow-up step genphy_config_eee_advert() can be removed. Note: We preserve the current behavior to ignore errors. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Link: https://patch.msgid.link/6e5cd4ab-28bb-4d82-b449-fec85f3d1e8a@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
* | net: phy: export genphy_c45_an_config_eee_anegHeiner Kallweit2024-11-081-0/+1
| | | | | | | | | | | | | | | | | | We'll use this function in bcm_config_lre_aneg(), therefore export it. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Link: https://patch.msgid.link/02bd7c39-7413-4433-bafc-a276089bd292@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
* | net: phy: make genphy_c45_write_eee_adv() staticHeiner Kallweit2024-11-081-1/+2
| | | | | | | | | | | | | | | | | | | | | | genphy_c45_write_eee_adv() isn't used outside phy-c45.c, so make it static. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Link: https://patch.msgid.link/d23bd784-44e6-4a15-af3a-b37379156521@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
* | Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netJakub Kicinski2024-11-071-0/+2
|\| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Cross-merge networking fixes after downstream PR (net-6.12-rc7). Conflicts: drivers/net/ethernet/freescale/enetc/enetc_pf.c e15c5506dd39 ("net: enetc: allocate vf_state during PF probes") 3774409fd4c6 ("net: enetc: build enetc_pf_common.c as a separate module") https://lore.kernel.org/20241105114100.118bd35e@canb.auug.org.au Adjacent changes: drivers/net/ethernet/ti/am65-cpsw-nuss.c de794169cf17 ("net: ethernet: ti: am65-cpsw: Fix multi queue Rx on J7") 4a7b2ba94a59 ("net: ethernet: ti: am65-cpsw: Use tstats instead of open coded version") Signed-off-by: Jakub Kicinski <kuba@kernel.org>
| * net: phy: ti: add PHY_RST_AFTER_CLK_EN flagDiogo Silva2024-11-061-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DP83848 datasheet (section 4.7.2) indicates that the reset pin should be toggled after the clocks are running. Add the PHY_RST_AFTER_CLK_EN to make sure that this indication is respected. In my experience not having this flag enabled would lead to, on some boots, the wrong MII mode being selected if the PHY was initialized on the bootloader and was receiving data during Linux boot. Signed-off-by: Diogo Silva <diogompaissilva@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Fixes: 34e45ad9378c ("net: phy: dp83848: Add TI DP83848 Ethernet PHY") Link: https://patch.msgid.link/20241102151504.811306-1-paissilva@ld-100007.ds1.internal Signed-off-by: Jakub Kicinski <kuba@kernel.org>
* | net: broadcom: use ethtool string helpersRosen Penev2024-11-071-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | The latter is the preferred way to copy ethtool strings. Avoids manually incrementing the pointer. Cleans up the code quite well. Signed-off-by: Rosen Penev <rosenp@gmail.com> Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Link: https://patch.msgid.link/20241104205317.306140-1-rosenp@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
* | net: phy: respect cached advertising when re-enabling EEEHeiner Kallweit2024-11-071-4/+3
| | | | | | | | | | | | | | | | | | | | | | If we remove modes from EEE advertisement and disable / re-enable EEE, then advertisement is set to all supported modes. I don't think this is what the user expects. So respect the cached advertisement and just fall back to all supported modes if cached advertisement is empty. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Link: https://patch.msgid.link/c75f7f8b-5571-429f-abd3-ce682d178a4b@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
* | net: phy: use ethtool string helpersRosen Penev2024-11-038-29/+15
| | | | | | | | | | | | | | | | | | | | These are the preferred way to copy ethtool strings. Avoids incrementing pointers all over the place. Signed-off-by: Rosen Penev <rosenp@gmail.com> Link: https://patch.msgid.link/20241029234641.11448-1-rosenp@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
* | net: phy: dp83822: Configure RMII mode on DP83825 devicesErik Schumacher2024-10-311-13/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Like the DP83826, the DP83825 can also be configured as an RMII master or slave via a control register. The existing function responsible for this configuration is renamed to a general dp8382x function. The DP83825 only supports RMII so nothing more needs to be configured. With this change, the dp83822_driver list is reorganized according to the device name. Signed-off-by: Erik Schumacher <erik.schumacher@iris-sensing.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://patch.msgid.link/aa62d081804f44b5af0e8de2372ae6bfe1affd34.camel@iris-sensing.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
* | net: phylink: simplify how SFP PHYs are attachedRussell King (Oracle)2024-10-291-30/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are a few issues with how SFP PHYs are attached: a) The phylink_sfp_connect_phy() and phylink_sfp_config_phy() code validates the configuration three times: 1. To discover the support/advertising masks that the PHY/PCS/MAC can support in order to select an interface. 2. To validate the selected interface. 3. When the PHY is brought up after being attached, another validation is done. This is needlessly complex. b) The configuration is set prior to the PHY being attached, which means we don't have the PHY available in phylink_major_config() for phylink_pcs_neg_mode() to make decisions upon. We have already added an extra step to validate the selected interface, so we can now move the attachment and bringup of the PHY earlier, inside phylink_sfp_config_phy(). This results in the validation at step 2 above becoming entirely unnecessary, so remove that too. Reviewed-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Tested-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Link: https://patch.msgid.link/E1t3bcb-000c8H-3e@rmk-PC.armlinux.org.uk Signed-off-by: Jakub Kicinski <kuba@kernel.org>
* | net: phylink: validate sfp_select_interface() returned interfaceRussell King (Oracle)2024-10-291-1/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | Validate that the returned interface from sfp_select_interface() is supportable by the MAC/PCS. If it isn't, print an error and return the NA interface type. This is a preparatory step to reorganising how a PHY on a SFP module is handled. Reviewed-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Tested-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Link: https://patch.msgid.link/E1t3bcV-000c8B-Vz@rmk-PC.armlinux.org.uk Signed-off-by: Jakub Kicinski <kuba@kernel.org>
* | net: phylink: add common validation for sfp_select_interface()Russell King (Oracle)2024-10-291-13/+19
| | | | | | | | | | | | | | | | | | | | | | | | Whenever we call sfp_select_interface(), we check the returned value and print an error. There are two cases where this happens with the same message. Provide a common function to do this. Reviewed-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Tested-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Link: https://patch.msgid.link/E1t3bcQ-000c85-S4@rmk-PC.armlinux.org.uk Signed-off-by: Jakub Kicinski <kuba@kernel.org>
* | net: phylink: simplify phylink_parse_fixedlink()Russell King (Oracle)2024-10-291-13/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | phylink_parse_fixedlink() wants to preserve the pause, asym_pause and autoneg bits in pl->supported. Rather than reading the bits into separate bools, zeroing pl->supported, and then setting them if they were previously set, use a mask and linkmode_and() to achieve the same result. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Reviewed-by: Simon Horman <horms@kernel.org> Link: https://patch.msgid.link/E1t3Fh5-000aQi-Nk@rmk-PC.armlinux.org.uk Signed-off-by: Jakub Kicinski <kuba@kernel.org>
* | Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netPaolo Abeni2024-10-251-2/+2
|\| | | | | | | | | | | | | | | Cross-merge networking fixes after downstream PR. No conflicts and no adjacent changes. Signed-off-by: Paolo Abeni <pabeni@redhat.com>
| * net: phy: dp83822: Fix reset pin definitionsMichel Alex2024-10-191-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change fixes a rare issue where the PHY fails to detect a link due to incorrect reset behavior. The SW_RESET definition was incorrectly assigned to bit 14, which is the Digital Restart bit according to the datasheet. This commit corrects SW_RESET to bit 15 and assigns DIG_RESTART to bit 14 as per the datasheet specifications. The SW_RESET define is only used in the phy_reset function, which fully re-initializes the PHY after the reset is performed. The change in the bit definitions should not have any negative impact on the functionality of the PHY. v2: - added Fixes tag - improved commit message Cc: stable@vger.kernel.org Fixes: 5dc39fd5ef35 ("net: phy: DP83822: Add ability to advertise Fiber connection") Signed-off-by: Alex Michel <alex.michel@wiedemann-group.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Message-ID: <AS1P250MB0608A798661549BF83C4B43EA9462@AS1P250MB0608.EURP250.PROD.OUTLOOK.COM> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
* | net: phy: marvell: Add mdix status reportingPaul Davey2024-10-221-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | Report MDI-X resolved state after link up. Tested on Linkstreet 88E6193X internal PHYs. Signed-off-by: Paul Davey <paul.davey@alliedtelesis.co.nz> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://patch.msgid.link/20241017015026.255224-1-paul.davey@alliedtelesis.co.nz Signed-off-by: Paolo Abeni <pabeni@redhat.com>
* | net: sfp: change quirks for Alcatel Lucent G-010S-PShengyu Qu2024-10-211-1/+2
| | | | | | | | | | | | | | | | | | | | Seems Alcatel Lucent G-010S-P also have the same problem that it uses TX_FAULT pin for SOC uart. So apply sfp_fixup_ignore_tx_fault to it. Signed-off-by: Shengyu Qu <wiagn233@outlook.com> Link: https://patch.msgid.link/TYCPR01MB84373677E45A7BFA5A28232C98792@TYCPR01MB8437.jpnprd01.prod.outlook.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
* | net: phy: realtek: add RTL8125D-internal PHYHeiner Kallweit2024-10-201-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | The first boards show up with Realtek's RTL8125D. This MAC/PHY chip comes with an integrated 2.5Gbps PHY with ID 0x001cc841. It's not clear yet whether there's an external version of this PHY and how Realtek calls it, therefore use the numeric id for now. Link: https://lore.kernel.org/netdev/2ada65e1-5dfa-456c-9334-2bc51272e9da@gmail.com/T/ Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Message-ID: <7d2924de-053b-44d2-a479-870dc3878170@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
* | net: phy: mediatek-ge-soc: Propagate error code correctly in cal_cycle()SkyLake.Huang2024-10-201-3/+5
| | | | | | | | | | | | | | | | | | This patch propagates error code correctly in cal_cycle() and improve with FIELD_GET(). Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com> Reviewed-by: Simon Horman <horms@kernel.org> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
* | net: phy: mediatek-ge-soc: Shrink line wrapping to 80 charactersSkyLake.Huang2024-10-201-37/+88
| | | | | | | | | | | | | | | | | | This patch shrinks line wrapping to 80 chars. Also, in tx_amp_fill_result(), use FIELD_PREP() to prettify code. Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com> Reviewed-by: Simon Horman <horms@kernel.org> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
* | net: phy: mediatek-ge-soc: Fix coding styleSkyLake.Huang2024-10-201-17/+19
| | | | | | | | | | | | | | | | | | | | This patch fixes spelling errors, re-arrange vars with reverse Xmas tree and remove unnecessary parens in mediatek-ge-soc.c. Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com> Reviewed-by: Simon Horman <horms@kernel.org> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
* | net: phylink: remove "using_mac_select_pcs"Russell King (Oracle)2024-10-181-10/+2
| | | | | | | | | | | | | | | | | | With DSA's implementation of the mac_select_pcs() method removed, we can now remove the detection of mac_select_pcs() implementation. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
* | net: phylink: remove use of pl->pcs in phylink_validate_mac_and_pcs()Russell King (Oracle)2024-10-181-3/+1
| | | | | | | | | | | | | | | | | | | | | | When the mac_select_pcs() method is not implemented, there is no way for pl->pcs to be set to a non-NULL value. This was here to support the old phylink_set_pcs() method which has been removed a few years ago. Simplify the code in phylink_validate_mac_and_pcs(). Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
* | net: phylink: allow mac_select_pcs() to remove a PCSRussell King (Oracle)2024-10-181-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | phylink has historically not permitted a PCS to be removed. An attempt to permit this with phylink_set_pcs() resulted in comments indicating that there was no need for this. This behaviour has been propagated forward to the mac_select_pcs() approach as it was believed from these comments that changing this would be NAK'd. However, with mac_select_pcs(), it takes more code and thus complexity to maintain this behaviour, which can - and in this case has - resulted in a bug. If mac_select_pcs() returns NULL for a particular interface type, but there is already a PCS in-use, then we skip the pcs_validate() method, but continue using the old PCS. Also, it wouldn't be expected behaviour by implementers of mac_select_pcs(). Allow this by removing this old unnecessary restriction. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
* | net: phy: realtek: merge the drivers for internal NBase-T PHY'sHeiner Kallweit2024-10-171-10/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Realtek RTL8125/RTL8126 NBase-T MAC/PHY chips have internal PHY's which are register-compatible, at least for the registers we use here. So let's use just one PHY driver to support all of them. These internal PHY's exist also as external C45 PHY's, but on the internal PHY's no access to MMD registers is possible. This can be used to differentiate between the internal and external version. As a side effect the drivers for two now external-only drivers don't require read_mmd/write_mmd hooks any longer. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Link: https://patch.msgid.link/c57081a6-811f-4571-ab35-34f4ca6de9af@gmail.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
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