| Commit message (Collapse) | Author | Age | Files | Lines |
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The arm-cci code uses device tree helpers for initialization
that don't work on kernels built without CONFIG_OF. Further,
it contains an inline assembly in cci_enable_port_for_self()
that uses ARMv7 instructions and fails to build when targetting
other ARM instruction set versions.
This works around both issues by limiting the scope of the
Kconfig symbol to platforms that can actually build this driver
cleanly.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Shawn Guo <shawn.guo@linaro.org>
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Pull block layer fixes from Jens Axboe:
"Final small batch of fixes to be included before -rc1. Some general
cleanups in here as well, but some of the blk-mq fixes we need for the
NVMe conversion and/or scsi-mq. The pull request contains:
- Support for not merging across a specified "chunk size", if set by
the driver. Some NVMe devices perform poorly for IO that crosses
such a chunk, so we need to support it generically as part of
request merging avoid having to do complicated split logic. From
me.
- Bump max tag depth to 10Ki tags. Some scsi devices have a huge
shared tag space. Before we failed with EINVAL if a too large tag
depth was specified, now we truncate it and pass back the actual
value. From me.
- Various blk-mq rq init fixes from me and others.
- A fix for enter on a dying queue for blk-mq from Keith. This is
needed to prevent oopsing on hot device removal.
- Fixup for blk-mq timer addition from Ming Lei.
- Small round of performance fixes for mtip32xx from Sam Bradshaw.
- Minor stack leak fix from Rickard Strandqvist.
- Two __init annotations from Fabian Frederick"
* 'for-linus' of git://git.kernel.dk/linux-block:
block: add __init to blkcg_policy_register
block: add __init to elv_register
block: ensure that bio_add_page() always accepts a page for an empty bio
blk-mq: add timer in blk_mq_start_request
blk-mq: always initialize request->start_time
block: blk-exec.c: Cleaning up local variable address returnd
mtip32xx: minor performance enhancements
blk-mq: ->timeout should be cleared in blk_mq_rq_ctx_init()
blk-mq: don't allow queue entering for a dying queue
blk-mq: bump max tag depth to 10K tags
block: add blk_rq_set_block_pc()
block: add notion of a chunk size for request merging
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This patch adds the following:
1) Compiler hinting in the fast path.
2) A prefetch of port->flags to eliminate moderate cpu stalling later
in mtip_hw_submit_io().
3) Eliminate a redundant rq_data_dir().
4) Reorder members of driver_data to eliminate false cacheline sharing
between irq_workers_active and unal_qdepth.
With some workload and topology configurations, I'm seeing ~1.5%
throughput improvement in small block random read benchmarks as well
as improved latency std. dev.
Signed-off-by: Sam Bradshaw <sbradshaw@micron.com>
Add include of <linux/prefetch.h>
Signed-off-by: Jens Axboe <axboe@fb.com>
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With the optimizations around not clearing the full request at alloc
time, we are leaving some of the needed init for REQ_TYPE_BLOCK_PC
up to the user allocating the request.
Add a blk_rq_set_block_pc() that sets the command type to
REQ_TYPE_BLOCK_PC, and properly initializes the members associated
with this type of request. Update callers to use this function instead
of manipulating rq->cmd_type directly.
Includes fixes from Christoph Hellwig <hch@lst.de> for my half-assed
attempt.
Signed-off-by: Jens Axboe <axboe@fb.com>
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Pull MTD updates from Brian Norris:
- refactor m25p80.c driver for use as a general SPI NOR framework for
other drivers which may speak to SPI NOR flash without providing full
SPI support (i.e., not part of drivers/spi/)
- new Freescale QuadSPI driver (utilizing new SPI NOR framework)
- updates for the STMicro "FSM" SPI NOR driver
- fix sync/flush behavior on mtd_blkdevs
- fixup subpage write support on a few NAND drivers
- correct the MTD OOB test for odd-sized OOB areas
- add BCH-16 support for OMAP NAND
- fix warnings and trivial refactoring
- utilize new ECC DT bindings in pxa3xx NAND driver
- new LPDDR NVM driver
- address a few assorted bugs caught by Coverity
- add new imx6sx support for GPMI NAND
- use a bounce buffer for NAND when non-DMA-able buffers are used
* tag 'for-linus-20140610' of git://git.infradead.org/linux-mtd: (77 commits)
mtd: gpmi: add gpmi support for imx6sx
mtd: maps: remove check for CONFIG_MTD_SUPERH_RESERVE
mtd: bf5xx_nand: use the managed version of kzalloc
mtd: pxa3xx_nand: make the driver work on big-endian systems
mtd: nand: omap: fix omap_calculate_ecc_bch() for-loop error
mtd: nand: r852: correct write_buf loop bounds
mtd: nand_bbt: handle error case for nand_create_badblock_pattern()
mtd: nand_bbt: remove unused variable
mtd: maps: sc520cdp: fix warnings
mtd: slram: fix unused variable warning
mtd: pfow: remove unused variable
mtd: lpddr: fix Kconfig dependency, for I/O accessors
mtd: nand: pxa3xx: Add supported ECC strength and step size to the DT binding
mtd: nand: pxa3xx: Use ECC strength and step size devicetree binding
mtd: nand: pxa3xx: Clean pxa_ecc_init() error handling
mtd: nand: Warn the user if the selected ECC strength is too weak
mtd: nand: omap: Documentation: How to select correct ECC scheme for your device ?
mtd: nand: omap: add support for BCH16_ECC - NAND driver updates
mtd: nand: omap: add support for BCH16_ECC - ELM driver updates
mtd: nand: omap: add support for BCH16_ECC - GPMC driver updates
...
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The gpmi's IP for imx6sx is nearly the same as the gpmi's IP for imx6q,
except the following two new features:
(1) the new BCH contoller has 62-BIT correcting ECC strength
(The BCH for imx6q only has 40-BIT ECC strength).
(2) add the hardware Randomizer support.
This patch does the follow changes:
(1) add a new macro GPMI_IS_MX6SX to represent the imx6sx's gpmi.
(2) add a new macro GPMI_IS_MX6.
We use this macro to initialize the same registers for both
imx6sx and imx6q, and so on.
(3) add a new gpmi_devdata instance, the gpmi_devdata_imx6sx, for
imx6sx.
Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Since (a few releases before) v2.6.0 there have been checks for
CONFIG_MTD_SUPERH_RESERVE. One check is still present. But a Kconfig
symbol MTD_SUPERH_RESERVE has never been added. So a few lines of dead
code can be removed.
Signed-off-by: Paul Bolle <pebolle@tiscali.nl>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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This patch moves data allocated using kzalloc to managed data allocated
using devm_kzalloc and cleans now unnecessary kfrees in probe and remove
functions. Also, the now unnecessary label out_err_hw_init is done away
with and the label out_err_kzalloc is renamed to out_err.
The following Coccinelle semantic patch was used for making the change:
@platform@
identifier p, probefn, removefn;
@@
struct platform_driver p = {
.probe = probefn,
.remove = removefn,
};
@prb@
identifier platform.probefn, pdev;
expression e, e1, e2;
@@
probefn(struct platform_device *pdev, ...) {
<+...
- e = kzalloc(e1, e2)
+ e = devm_kzalloc(&pdev->dev, e1, e2)
...
?-kfree(e);
...+>
}
@rem depends on prb@
identifier platform.removefn;
expression e;
@@
removefn(...) {
<...
- kfree(e);
...>
}
Signed-off-by: Himangi Saraogi <himangi774@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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The pxa3xx_nand driver currently uses __raw_writel() and __raw_readl()
to access I/O registers. However, those functions do not do any
endianness swapping, which means that they won't work when the CPU
runs in big-endian but the I/O registers are little endian, which is
the common situation for ARM systems running big endian.
Since __raw_writel() and __raw_readl() do not include any memory
barriers and the pxa3xx_nand driver can only be compiled for ARM
platforms, the closest I/o accessors functions that do endianess
swapping are writel_relaxed() and readl_relaxed().
This patch has been verified to work on Armada XP GP: without the
patch, the NAND is not detected when the kernel runs big endian while
it is properly detected when the kernel runs little endian. With the
patch applied, the NAND is properly detected in both situations
(little and big endian).
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: <stable@vger.kernel.org> # v3.13+
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Fixes: 2c9f2365d1e1d0e318b068f683f18c99515b80f8
mtd: nand: omap: ecc.calculate: merge omap3_calculate_ecc_bch4 in omap_calculate_ecc_bch
Fixes: 7bcd1dca1d587ad29f9825ba4414620440e8c8da
mtd: nand: omap: ecc.calculate: merge omap3_calculate_ecc_bch8 in omap_calculate_ecc_bch
Cc: <stable@vger.kernel.org> # 3.13.x+
Signed-off-by: Ted Juan <ted.juan@gmail.com>
Acked-by: Pekon Gupta <pekon@ti.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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The two loops in r852_write_buf() are designed to handle 4-byte-aligned
and then 1-byte-aligned portions, respectively. However, there are two
issues:
(1) The first loop will only terminate if 'len' is a multiple of 4
(2) The second loop will never terminate if it runs at least once
Rewrite these loops as they were probably intended. Compile tested only.
Issues pointed out by Coverity Scan.
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Cc: Maxim Levitsky <maximlevitsky@gmail.com>
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Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Set, but unused, variable.
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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On m86k, and maybe a few other architectures, we get this kind of
warning, due to misuse of volatile:
drivers/mtd/maps/sc520cdp.c: In function 'sc520cdp_setup_par':
>> drivers/mtd/maps/sc520cdp.c:223:2: warning: passing argument 1 of 'iounmap' discards 'volatile' qualifier from pointer target type [enabled by default]
arch/m68k/include/asm/raw_io.h:22:13: note: expected 'void *' but argument is of type 'volatile long unsigned int *'
Rather than annotating the variable declaration, let's just use the
proper accessors, which add the 'volatile' qualifier to the operation.
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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drivers/mtd/devices/slram.c: In function 'init_slram':
drivers/mtd/devices/slram.c:283:6: warning: variable 'i' set but not used [-Wunused-but-set-variable]
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Not all architectures implement a writel_relaxed() accessor. Hopefully
this will change eventually, but for now, this means lpddr2_nvm.c can't
compile on some architectures.
Let's add an ARM dependency for now, and leave a comment so maybe we can
change this in the future.
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Cc: Vincenzo Aliberti <vincenzo.aliberti@gmail.com>
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This commit adds support for the user to specify the ECC strength
and step size through the devicetree. We keep the previous behavior,
when there is no DT parameter provided.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Let's make pxa_ecc_init() return a negative errno on error or zero
if succesful, which is standard kernel practice. Also, report the
selected ECC strength and step size, which is important information.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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This commit makes use of the chip->ecc_strength_ds and chip->ecc_step_ds which
contain the datasheet minimum requested ECC strength to produce a noisy warning
if the configured ECC strength is weaker.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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This patch add support for BCH16 ecc-scheme in OMAP NAND driver, by extending
following functions:
- omap_enable_hwecc (nand_chip->ecc.hwctl): configure GPMC controller
- omap_calculate_ecc_bch (nand_chip->ecc.calculate): fetch ECC signature from GPMC controller
- omap_elm_correct_data (nand_chip->ecc.correct): detect and correct ECC errors using ELM
(a) BCH16 ecc-scheme can detect and correct 16 bit-flips per 512Bytes of data.
(b) BCH16 ecc-scheme generates 26-bytes of ECC syndrome / 512B.
Due to (b) this scheme can only be used with NAND devices which have enough
OOB to satisfy the relation: "OOBsize per page >= 26 * (page-size / 512)"
Signed-off-by: Pekon Gupta <pekon@ti.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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ELM hardware engine is used to detect ECC errors for BCHx ecc-schemes
(like BCH4/BCH8/BCH16). This patch extends configuration of ELM registers
for adding support of BCH16_HW ecc-scheme.
Signed-off-by: Pekon Gupta <pekon@ti.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Signed-off-by: Ron Lee <ron@debian.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Signed-off-by: Vincenzo Aliberti <vincenzo.aliberti@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Enhances the help for the CFI command set choices.
Signed-off-by: Philippe De Muyter <phdm@macqel.be>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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A workaround was already in place that set the WP bit in the
IFC_CSPR0 register after a STATUS command, however it used an 8-bit
write method. As a result, the WP bit was never set on 16-bit devices,
and these devices would eventually be incorrectly marked as
write-protected.
This patch checks the chip options for a 16-bit device and uses the
appropriate write method to set the WP bit after a STATUS command.
Signed-off-by: Joe Schultz <jschultz@xes-inc.com>
Signed-off-by: Aaron Sierra <asierra@xes-inc.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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The IFC buffer is accessed via 8-bit and 16-bit accessors. Changing
the 'addr' member of 'struct fsl_ifc_nand_ctrl' from 'u8 __iomem *' to
'void __iomem *' eliminates the need for explicit casts when the
16-bit accessors are used.
Signed-off-by: Aaron Sierra <asierra@xes-inc.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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The break statements should be indented another tab.
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Reviewed-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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nand_base can be passed a kmap()'d buffers from highmem by
filesystems like jffs2. This results in failure to map the
physical address of the DMA buffer on various contoller
driver on different platforms. This change adds a chip option
to use preallocated databuf as bounce buffers used in
nand_do_read_ops() and nand_do_write_ops().
This allows for specific nand controller driver to set this
option as needed.
Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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As subpage write is enabled by default for all drivers, nand_write_subpage_hwecc
causes a crash if the driver did not register ecc->hwctl or ecc->calculate.
This behavior was introduced in
commit 837a6ba4f3b6d23026674e6af6b6849a4634fff9
"mtd: nand: subpage write support for hardware based ECC schemes".
This fixes a crash by emulating subpage write support by padding sub-page data
with 0xff on either sides to make it full page compatible.
Reported-by: Helmut Schaa <helmut.schaa@googlemail.com>
Tested-by: Helmut Schaa <helmut.schaa@googlemail.com>
Signed-off-by: Pekon Gupta <pekon@ti.com>
Reviewed-by: Scott Wood <scottwood@freescale.com>
Cc: <stable@vger.kernel.org> # 3.10.x+
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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The samsung onenand driver passes around a dma address token
through a void pointer, which is incorrect and leads to
warnings like this one:
onenand/samsung.c:548:2: warning: passing argument 1 of '__fswab32' makes integer from pointer without a cast [enabled by default]
writel(src, base + S5PC110_DMA_SRC_ADDR);
^
This patch makes it use dma_addr_t here, which is more appropriate.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: linux-mtd@lists.infradead.org
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Make of_device_id array const, because all OF functions
handle it as const.
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Make of_device_id array const, because all OF functions
handle it as const.
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Acked-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Make of_device_id array const, because all OF functions
handle it as const.
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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On m68k, where access_ok() doesn't cast the address parameter:
drivers/mtd/mtdchar.c: In function 'mtdchar_write_ioctl':
drivers/mtd/mtdchar.c:575:4: warning: passing argument 2 of 'access_ok' makes pointer from integer without a cast [enabled by default]
arch/m68k/include/asm/uaccess_mm.h:17:90: note: expected 'const void *' but argument is of type '__u64'
drivers/mtd/mtdchar.c:576:4: warning: passing argument 2 of 'access_ok' makes pointer from integer without a cast [enabled by default]
arch/m68k/include/asm/uaccess_mm.h:17:90: note: expected 'const void *' but argument is of type '__u64'
The address parameter of access_ok() is really a userspace pointer.
On most architectures, access_ok() is a macro that casts the address
parameter, hiding issues in its users.
Move around and use the existing usr_data and usr_oob temporary variables
to kill the warnings. Add a few "consts", and make more use of the
temporaries while we're at it.
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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erased-page
fixes: commit 62116e5171e00f85a8d53f76e45b84423c89ff34
mtd: nand: omap2: Support for hardware BCH error correction.
In omap_elm_correct_data(), if bitflip_count in an erased-page is within the
correctable limit (< ecc.strength), then it is not indicated back to the caller
ecc->read_page().
This mis-guides upper layers like MTD and UBIFS layer to assume erased-page as
perfectly clean and use it for writing even if actual bitflip_count was
dangerously high (bitflip_count > mtd->bitflip_threshold).
This patch fixes this above issue, by returning 'stats' to caller
ecc->read_page() under all scenarios.
Reported-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Pekon Gupta <pekon@ti.com>
Cc: <stable@vger.kernel.org> # 3.9.x+
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Spansion s25sl032p supports Dual and Quad SPI transfers, hence set the
SPI_NOR_DUAL_READ and SPI_NOR_QUAD_READ flags.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Commit 03e296f613affcc2671c1e86d8c25ecad867204e ("mtd: m25p80: use the SPI
nor framework") accidentally removed support for Dual SPI read transfers.
Add it back.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Huang Shijie <shijie8@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Fixes:
drivers/mtd/devices/elm.c:480:12: warning: 'elm_suspend' defined but not used [-Wunused-function]
drivers/mtd/devices/elm.c:488:12: warning: 'elm_resume' defined but not used [-Wunused-function]
Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
Acked-by: Pekon Gupta <pekon@ti.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Anyone working with an AMD Elan SC520 development or evaluation board
would be building a dedicated kernel for it, so we can make the
sc520cdp and netsc520 maps depend on MELAN. SC520_CPUFREQ already
depends on MELAN so it makes things more consistent. It also makes
kernel configuration for every other x86 user easier.
Signed-off-by: Jean Delvare <jdelvare@suse.de>
Cc: David Woodhouse <dwmw2@infradead.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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The nand_chip::erase_cmd callback previously served a dual purpose; for
one, it allowed a per-flash-chip override, so that AG-AND devices could
use a different erase command than other NAND. These AND devices were
dropped in commit 14c6578683367b1e7af0c3c09e872b45a45183a7 (mtd: nand:
remove AG-AND support). On the other hand, some drivers (denali and
doc-g4) need to use this sort of callback to implement
controller-specific erase operations.
To make the latter operation easier for some drivers (e.g., ST's new BCH
NAND driver), it helps if the command dispatch and wait functions can be
lumped together, rather than called separately.
This patch does two things:
1. Pull the call to chip->waitfunc() into chip->erase_cmd(), and return
the status from this callback
2. Rename erase_cmd() to just erase(), since this callback does a
little more than just send a command
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Tested-by: Lee Jones <lee.jones@linaro.org>
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Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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mtd_oobtest writes OOB, read it back and verify. The verification is
not correctly done if oobsize is not multiple of 4. Although the data
to be written and the data to be compared are generated by several
prandom_byte_state() calls starting with the same seed, these two are
generated with the different size and different number of calls.
Due to the implementation of prandom_byte_state() if the size on each
call is not multiple of 4, the resulting data is not always same.
This fixes it by just calling prandom_byte_state() once and using
correct range instead of calling it multiple times for each.
Reported-by: George Cherian <george.cherian@ti.com>
Reported-by: Lothar Waßmann <LW@KARO-electronics.de>
Tested-by: Lothar Waßmann <LW@KARO-electronics.de>
Cc: George Cherian <george.cherian@ti.com>
Cc: Lothar Waßmann <LW@KARO-electronics.de>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Lee Jones <lee.jones@linaro.org>
Cc: linux-mtd@lists.infradead.org
Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Addition of the spi-nor framework, plus updates to the ST SPI FSM
driver.
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COMPILE_TEST allows us to build this driver on other arch'es. But not
all arch'es have the right I/O accessors -- particularly, x86 is missing
readsl() and writesl().
So just restrict this driver to ARCH_STI. It's still buildable for a
multiplatform ARM kernel, so it can get decent compile coverage.
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
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Compile-testing for a 64-bit arch uncovers several bad casts:
In file included from include/linux/linkage.h:4:0,
from include/linux/kernel.h:6,
from drivers/mtd/devices/st_spi_fsm.c:15:
drivers/mtd/devices/st_spi_fsm.c: In function ‘stfsm_read_fifo’:
drivers/mtd/devices/st_spi_fsm.c:758:11: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
BUG_ON((((uint32_t)buf) & 0x3) || (size & 0x3));
...
Use uintptr_t instead of uint32_t, since it's guaranteed to be
pointer-sized.
We also see this warning, if size_t is not 32 bits wide:
In file included from drivers/mtd/devices/st_spi_fsm.c:15:0:
drivers/mtd/devices/st_spi_fsm.c: In function ‘stfsm_mtd_write’:
include/linux/kernel.h:712:17: warning: comparison of distinct pointer types lacks a cast [enabled by default]
(void) (&_min1 == &_min2); \
^
drivers/mtd/devices/st_spi_fsm.c:1704:11: note: in expansion of macro ‘min’
bytes = min(FLASH_PAGESIZE - page_offs, len);
^
Just use min_t() to force the type conversion, since we don't really
want to upgrade 'page_offs' and 'bytes' to size_t; they only should be
handling <= 256 byte offsets.
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
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This corrects some sparse warnings:
drivers/mtd/spi-nor/fsl-quadspi.c:281:31: warning: incorrect type in initializer (different address spaces) [sparse]
drivers/mtd/spi-nor/fsl-quadspi.c:281:31: expected void *[noderef] <asn:2>base [sparse]
drivers/mtd/spi-nor/fsl-quadspi.c:281:31: got void [noderef] <asn:2>*iobase [sparse]
(etc.)
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Acked-by: Huang Shijie <b32955@freescale.com>
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There's no reason this can't be a module. Also, give SPI-NOR its own
submenu.
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Reviewed-by: Marek Vasut <marex@denx.de>
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Many of the serial_flash_cmds.h opcodes are duplicated with spi-nor.h.
Let's begin to unify them.
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Reviewed-by: Marek Vasut <marex@denx.de>
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Begin to unify the differences between serial_flash_cmds.h and
spi-nor.h.
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Reviewed-by: Marek Vasut <marex@denx.de>
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These are also in serial_flash_cmds.h. (FWIW, I didn't know the C
preprocessor allowed redefinitions without warning like this.)
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Reviewed-by: Marek Vasut <marex@denx.de>
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