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Merge yet more updates from Andrew Morton:
- various hotfixes
- kexec_file updates and feature work
* emailed patches from Andrew Morton <akpm@linux-foundation.org>: (27 commits)
kernel/kexec_file.c: move purgatories sha256 to common code
kernel/kexec_file.c: allow archs to set purgatory load address
kernel/kexec_file.c: remove mis-use of sh_offset field during purgatory load
kernel/kexec_file.c: remove unneeded variables in kexec_purgatory_setup_sechdrs
kernel/kexec_file.c: remove unneeded for-loop in kexec_purgatory_setup_sechdrs
kernel/kexec_file.c: split up __kexec_load_puragory
kernel/kexec_file.c: use read-only sections in arch_kexec_apply_relocations*
kernel/kexec_file.c: search symbols in read-only kexec_purgatory
kernel/kexec_file.c: make purgatory_info->ehdr const
kernel/kexec_file.c: remove checks in kexec_purgatory_load
include/linux/kexec.h: silence compile warnings
kexec_file, x86: move re-factored code to generic side
x86: kexec_file: clean up prepare_elf64_headers()
x86: kexec_file: lift CRASH_MAX_RANGES limit on crash_mem buffer
x86: kexec_file: remove X86_64 dependency from prepare_elf64_headers()
x86: kexec_file: purge system-ram walking from prepare_elf64_headers()
kexec_file,x86,powerpc: factor out kexec_file_ops functions
kexec_file: make use of purgatory optional
proc: revalidate misc dentries
mm, slab: reschedule cache_reap() on the same CPU
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The code to verify the new kernels sha digest is applicable for all
architectures. Move it to common code.
One problem is the string.c implementation on x86. Currently sha256
includes x86/boot/string.h which defines memcpy and memset to be gcc
builtins. By moving the sha256 implementation to common code and
changing the include to linux/string.h both functions are no longer
defined. Thus definitions have to be provided in x86/purgatory/string.c
Link: http://lkml.kernel.org/r/20180321112751.22196-12-prudo@linux.vnet.ibm.com
Signed-off-by: Philipp Rudo <prudo@linux.vnet.ibm.com>
Acked-by: Dave Young <dyoung@redhat.com>
Cc: AKASHI Takahiro <takahiro.akashi@linaro.org>
Cc: Eric Biederman <ebiederm@xmission.com>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Ingo Molnar <mingo@kernel.org>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Thiago Jung Bauermann <bauerman@linux.vnet.ibm.com>
Cc: Vivek Goyal <vgoyal@redhat.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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For s390 new kernels are loaded to fixed addresses in memory before they
are booted. With the current code this is a problem as it assumes the
kernel will be loaded to an 'arbitrary' address. In particular,
kexec_locate_mem_hole searches for a large enough memory region and sets
the load address (kexec_bufer->mem) to it.
Luckily there is a simple workaround for this problem. By returning 1
in arch_kexec_walk_mem, kexec_locate_mem_hole is turned off. This
allows the architecture to set kbuf->mem by hand. While the trick works
fine for the kernel it does not for the purgatory as here the
architectures don't have access to its kexec_buffer.
Give architectures access to the purgatories kexec_buffer by changing
kexec_load_purgatory to take a pointer to it. With this change
architectures have access to the buffer and can edit it as they need.
A nice side effect of this change is that we can get rid of the
purgatory_info->purgatory_load_address field. As now the information
stored there can directly be accessed from kbuf->mem.
Link: http://lkml.kernel.org/r/20180321112751.22196-11-prudo@linux.vnet.ibm.com
Signed-off-by: Philipp Rudo <prudo@linux.vnet.ibm.com>
Reviewed-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Acked-by: Dave Young <dyoung@redhat.com>
Cc: AKASHI Takahiro <takahiro.akashi@linaro.org>
Cc: Eric Biederman <ebiederm@xmission.com>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Ingo Molnar <mingo@kernel.org>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Thiago Jung Bauermann <bauerman@linux.vnet.ibm.com>
Cc: Vivek Goyal <vgoyal@redhat.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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When the relocations are applied to the purgatory only the section the
relocations are applied to is writable. The other sections, i.e. the
symtab and .rel/.rela, are in read-only kexec_purgatory. Highlight this
by marking the corresponding variables as 'const'.
While at it also change the signatures of arch_kexec_apply_relocations* to
take section pointers instead of just the index of the relocation section.
This removes the second lookup and sanity check of the sections in arch
code.
Link: http://lkml.kernel.org/r/20180321112751.22196-6-prudo@linux.vnet.ibm.com
Signed-off-by: Philipp Rudo <prudo@linux.vnet.ibm.com>
Acked-by: Dave Young <dyoung@redhat.com>
Cc: AKASHI Takahiro <takahiro.akashi@linaro.org>
Cc: Eric Biederman <ebiederm@xmission.com>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Ingo Molnar <mingo@kernel.org>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Thiago Jung Bauermann <bauerman@linux.vnet.ibm.com>
Cc: Vivek Goyal <vgoyal@redhat.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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The kexec_purgatory buffer is read-only. Thus all pointers into
kexec_purgatory are read-only, too. Point this out by explicitly
marking purgatory_info->ehdr as 'const' and update the comments in
purgatory_info.
Link: http://lkml.kernel.org/r/20180321112751.22196-4-prudo@linux.vnet.ibm.com
Signed-off-by: Philipp Rudo <prudo@linux.vnet.ibm.com>
Acked-by: Dave Young <dyoung@redhat.com>
Cc: AKASHI Takahiro <takahiro.akashi@linaro.org>
Cc: Eric Biederman <ebiederm@xmission.com>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Ingo Molnar <mingo@kernel.org>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Thiago Jung Bauermann <bauerman@linux.vnet.ibm.com>
Cc: Vivek Goyal <vgoyal@redhat.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Patch series "kexec_file: Clean up purgatory load", v2.
Following the discussion with Dave and AKASHI, here are the common code
patches extracted from my recent patch set (Add kexec_file_load support
to s390) [1]. The patches were extracted to allow upstream integration
together with AKASHI's common code patches before the arch code gets
adjusted to the new base.
The reason for this series is to prepare common code for adding
kexec_file_load to s390 as well as cleaning up the mis-use of the
sh_offset field during purgatory load. In detail this series contains:
Patch #1&2: Minor cleanups/fixes.
Patch #3-9: Clean up the purgatory load/relocation code. Especially
remove the mis-use of the purgatory_info->sechdrs->sh_offset field,
currently holding a pointer into either kexec_purgatory (ro) or
purgatory_buf (rw) depending on the section. With these patches the
section address will be calculated verbosely and sh_offset will contain
the offset of the section in the stripped purgatory binary
(purgatory_buf).
Patch #10: Allows architectures to set the purgatory load address. This
patch is important for s390 as the kernel and purgatory have to be
loaded to fixed addresses. In current code this is impossible as the
purgatory load is opaque to the architecture.
Patch #11: Moves x86 purgatories sha implementation to common lib/
directory to allow reuse in other architectures.
This patch (of 11)
When building the kernel with CONFIG_KEXEC_FILE enabled gcc prints a
compile warning multiple times.
In file included from <path>/linux/init/initramfs.c:526:0:
<path>/include/linux/kexec.h:120:9: warning: `struct kimage' declared inside parameter list [enabled by default]
unsigned long cmdline_len);
^
This is because the typedefs for kexec_file_load uses struct kimage
before it is declared. Fix this by simply forward declaring struct
kimage.
Link: http://lkml.kernel.org/r/20180321112751.22196-2-prudo@linux.vnet.ibm.com
Signed-off-by: Philipp Rudo <prudo@linux.vnet.ibm.com>
Acked-by: Dave Young <dyoung@redhat.com>
Cc: Eric Biederman <ebiederm@xmission.com>
Cc: Vivek Goyal <vgoyal@redhat.com>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Thiago Jung Bauermann <bauerman@linux.vnet.ibm.com>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: AKASHI Takahiro <takahiro.akashi@linaro.org>
Cc: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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In the previous patches, commonly-used routines, exclude_mem_range() and
prepare_elf64_headers(), were carved out. Now place them in kexec
common code. A prefix "crash_" is given to each of their names to avoid
possible name collisions.
Link: http://lkml.kernel.org/r/20180306102303.9063-8-takahiro.akashi@linaro.org
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Acked-by: Dave Young <dyoung@redhat.com>
Tested-by: Dave Young <dyoung@redhat.com>
Cc: Vivek Goyal <vgoyal@redhat.com>
Cc: Baoquan He <bhe@redhat.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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As arch_kexec_kernel_image_{probe,load}(),
arch_kimage_file_post_load_cleanup() and arch_kexec_kernel_verify_sig()
are almost duplicated among architectures, they can be commonalized with
an architecture-defined kexec_file_ops array. So let's factor them out.
Link: http://lkml.kernel.org/r/20180306102303.9063-3-takahiro.akashi@linaro.org
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Acked-by: Dave Young <dyoung@redhat.com>
Tested-by: Dave Young <dyoung@redhat.com>
Cc: Vivek Goyal <vgoyal@redhat.com>
Cc: Baoquan He <bhe@redhat.com>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Thiago Jung Bauermann <bauerman@linux.vnet.ibm.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux
Pull thermal management update from Zhang Rui:
- Fix race condition in imx_thermal_probe() (Mikhail Lappo)
- Add cooling device's statistics in sysfs (Viresh Kumar)
* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux:
thermal: Add cooling device's statistics in sysfs
thermal: imx: Fix race condition in imx_thermal_probe()
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This extends the sysfs interface for thermal cooling devices and exposes
some pretty useful statistics. These statistics have proven to be quite
useful specially while doing benchmarks related to the task scheduler,
where we want to make sure that nothing has disrupted the test,
specially the cooling device which may have put constraints on the CPUs.
The information exposed here tells us to what extent the CPUs were
constrained by the thermal framework.
The write-only "reset" file is used to reset the statistics.
The read-only "time_in_state_ms" file shows the time (in msec) spent by the
device in the respective cooling states, and it prints one line per
cooling state.
The read-only "total_trans" file shows single positive integer value
showing the total number of cooling state transitions the device has
gone through since the time the cooling device is registered or the time
when statistics were reset last.
The read-only "trans_table" file shows a two dimensional matrix, where
an entry <i,j> (row i, column j) represents the number of transitions
from State_i to State_j.
This is how the directory structure looks like for a single cooling
device:
$ ls -R /sys/class/thermal/cooling_device0/
/sys/class/thermal/cooling_device0/:
cur_state max_state power stats subsystem type uevent
/sys/class/thermal/cooling_device0/power:
autosuspend_delay_ms runtime_active_time runtime_suspended_time
control runtime_status
/sys/class/thermal/cooling_device0/stats:
reset time_in_state_ms total_trans trans_table
This is tested on ARM 64-bit Hisilicon hikey620 board running Ubuntu and
ARM 64-bit Hisilicon hikey960 board running Android.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/jdelvare/staging
Pull dmi updates from Jean Delvare.
* 'dmi-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jdelvare/staging:
firmware: dmi_scan: Use lowercase letters for UUID
firmware: dmi_scan: Add DMI_OEM_STRING support to dmi_matches
firmware: dmi_scan: Fix UUID length safety check
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OEM strings are defined by each OEM and they contain customized and
useful OEM information. Supporting it provides more flexible uses of
the dmi_matches function.
Signed-off-by: Alex Hung <alex.hung@canonical.com>
Signed-off-by: Jean Delvare <jdelvare@suse.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/bleung/chrome-platform
Pull chrome platform updates from Benson Leung:
- a series from Dmitry to remove platform data from chromeos_laptop.c,
which was the only user of platform data for the atmel_mxt_ts driver.
- a series to clean up sysfs and debugfs for cros_ec
- other misc cleanups
* tag 'chrome-platform-for-linus-4.17' of git://git.kernel.org/pub/scm/linux/kernel/git/bleung/chrome-platform: (22 commits)
platform/chrome: mfd/cros_ec_dev: Add sysfs entry to set keyboard wake lid angle
platform/chrome: cros_ec_debugfs: Add PD port info to debugfs
platform/chrome: cros_ec_debugfs: Use octal permissions '0444'
platform/chrome: cros_ec_sysfs: use permission-specific DEVICE_ATTR variants
platform/chrome: cros_ec_sysfs: introduce to_cros_ec_dev define.
platform/chrome: cros_ec_sysfs: Modify error handling
platform/chrome: cros_ec_lpc: Add support for Google devices using custom coreboot firmware
platform/chrome: cros_ec_lpc: wake up from s2idle on Chrome EC
Input: atmel_mxt_ts - remove platform data support
platform/chrome: chromeos_laptop - discard data for unneeded boards
platform/chrome: chromeos_laptop - use device properties for Pixel
platform/chrome: chromeos_laptop - rely on I2C to set up interrupt trigger
platform/chrome: chromeos_laptop - use I2C notifier to create devices
platform/chrome: chromeos_laptop - parse DMI IRQ data once
platform/chrome: chromeos_laptop - rework i2c peripherals initialization
platform/chrome: chromeos_laptop - factor out getting IRQ from DMI
platform/chrome: chromeos_laptop - introduce pr_fmt()
platform/chrome: chromeos_laptop - stop setting suspend mode for Atmel devices
platform/chrome: chromeos_laptop - add SPDX identifier
Input: atmel_mxt_ts - switch ChromeOS ACPI devices to generic props
...
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'origin/ib-chrome-platform-cros-ec-sysfs-debugfs-for-v4.17' into working-branch-for-4.17
Merging Enric's cros-ec sysfs and debugfs fixes from immutable branch.
Signed-off-by: Benson Leung <bleung@chromium.org>
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This adds a sysfs attribute (/sys/class/chromeos/cros_ec/kb_wake_angle)
used to set and get the keyboard wake lid angle. This attribute is
present only if 2 accelerometers are controlled by the EC.
This patch also moves the cros_ec features check before the device is
added so the features map obtained from the EC is ready on time.
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Benson Leung <bleung@chromium.org>
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Add info useful for debugging USB-PD port state.
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Benson Leung <bleung@chromium.org>
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Now that there are no users of custom Atmel platform data, and everyone
has switched to the generic device properties, we can remove support for
the platform data.
Acked-by: Nick Dyer <nick@shmanahar.org>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Signed-off-by: Benson Leung <bleung@chromium.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd:
"The large diff this time around is from the addition of a new clk
driver for the TI Davinci family of SoCs. So far those clks have been
supported with a custom implementation of the clk API in the arch port
instead of in the CCF. With this driver merged we're one step closer
to having a single clk API implementation.
The other large diff is from the Amlogic clk driver that underwent
some major surgery to use regmap. Beyond that, the biggest hitter is
Samsung which needed some reworks to properly handle clk provider
power domains and a bunch of PLL rate updates.
The core framework was fairly quiet this round, just getting some
cleanups and small fixes for some of the more esoteric features. And
the usual set of driver non-critical fixes, cleanups, and minor
additions are here as well.
Core:
- Rejig clk_ops::init() to be a little earlier for phase/accuracy ops
- debugfs ops macroized to shave some lines of boilerplate code
- Always calculate the phase instead of caching it in clk_get_phase()
- More __must_check on bulk clk APIs
New Drivers:
- TI's Davinci family of SoCs
- Intel's Stratix10 SoC
- stm32mp157 SoC
- Allwinner H6 CCU
- Silicon Labs SI544 clock generator chip
- Renesas R-Car M3-N and V3H SoCs
- i.MX6SLL SoCs
Removed Drivers:
- ST-Ericsson AB8540/9540
Updates:
- Mediatek MT2701 and MT7622 audsys support and MT2712 updates
- STM32F469 DSI and STM32F769 sdmmc2 support
- GPIO clks can sleep now
- Spreadtrum SC9860 RTC clks
- Nvidia Tegra MBIST workarounds and various minor fixes
- Rockchip phase handling fixes and a memory leak plugged
- Renesas drivers switch to readl/writel from clk_readl/clk_writel
- Renesas gained CPU (Z/Z2) and watchdog support
- Rockchip rk3328 display clks and rk3399 1.6GHz PLL support
- Qualcomm PM8921 PMIC XO buffers
- Amlogic migrates to regmap APIs
- TI Keystone clk latching support
- Allwinner H3 and H5 video clk fixes
- Broadcom BCM2835 PLLs needed another bit to enable
- i.MX6SX CKO mux fix and i.MX7D Video PLL divider fix
- i.MX6UL/ULL epdc_podf support
- Hi3798CV200 COMBPHY0 and USB2_OTG_UTMI and phase support for eMMC"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (233 commits)
clk: davinci: add a reset lookup table for psc0
clk: imx: add clock driver for imx6sll
dt-bindings: imx: update clock doc for imx6sll
clk: imx: add new gate/gate2 wrapper funtion
clk: imx: Add CLK_IS_CRITICAL flag for busy divider and busy mux
clk: cs2000: set pm_ops in hibernate-compatible way
clk: bcm2835: De-assert/assert PLL reset signal when appropriate
clk: imx7d: Move clks_init_on before any clock operations
clk: imx7d: Correct ahb clk parent select
clk: imx7d: Correct dram pll type
clk: imx7d: Add USB clock information
clk: socfpga: stratix10: add clock driver for Stratix10 platform
dt-bindings: documentation: add clock bindings information for Stratix10
clk: ti: fix flag space conflict with clkctrl clocks
clk: uniphier: add additional ethernet clock lines for Pro4
clk: uniphier: add SATA clock control support
clk: uniphier: add PCIe clock control support
clk: Add driver for the si544 clock generator chip
clk: davinci: Remove redundant dev_err calls
clk: uniphier: add ethernet clock control support for PXs3
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* clk-davinci:
clk: davinci: add a reset lookup table for psc0
reset: modify the way reset lookup works for board files
reset: add support for non-DT systems
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clk-davinci
We need this to be able to use the reset_controller_add_lookup() API.
* 'reset/lookup' of git://git.pengutronix.de/git/pza/linux:
reset: modify the way reset lookup works for board files
reset: add support for non-DT systems
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'clk-imx6sll' into clk-next
* clk-stratix10:
clk: socfpga: stratix10: add clock driver for Stratix10 platform
dt-bindings: documentation: add clock bindings information for Stratix10
* clk-imx:
clk: imx7d: Move clks_init_on before any clock operations
clk: imx7d: Correct ahb clk parent select
clk: imx7d: Correct dram pll type
clk: imx7d: Add USB clock information
clk: imx: pllv2: avoid using uninitialized values
clk: imx6ull: Add epdc_podf instead of sim_podf
clk: imx: imx7d: correct video pll clock tree
clk: imx: imx7d: add the Keypad Port module clock
clk: imx7d: add CAAM clock
clk: imx: imx7d: add the snvs clock
clk: imx: imx6sx: update cko mux options
* clk-bcm:
clk: bcm2835: De-assert/assert PLL reset signal when appropriate
* clk-cs2000:
clk: cs2000: set pm_ops in hibernate-compatible way
* clk-imx6sll:
clk: imx: add clock driver for imx6sll
dt-bindings: imx: update clock doc for imx6sll
clk: imx: add new gate/gate2 wrapper funtion
clk: imx: Add CLK_IS_CRITICAL flag for busy divider and busy mux
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Add clock binding doc update for imx6sll.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Acked-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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Document that Stratix10 clock bindings, and add the clock header file. The
clock header is an enumeration of all the different clocks on the Stratix10
platform.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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and 'clk-ti-flag-fix' into clk-next
* clk-davinci:
clk: davinci: Remove redundant dev_err calls
clk: davinci: cfgchip: Add TI DA8XX USB PHY clocks
clk: davinci: New driver for TI DA8XX CFGCHIP clocks
dt-bindings: clock: Add bindings for DA8XX CFGCHIP clocks
clk: davinci: Add platform information for TI DM646x PSC
clk: davinci: Add platform information for TI DM644x PSC
clk: davinci: Add platform information for TI DM365 PSC
clk: davinci: Add platform information for TI DM355 PSC
clk: davinci: Add platform information for TI DA850 PSC
clk: davinci: Add platform information for TI DA830 PSC
clk: davinci: New driver for davinci PSC clocks
dt-bindings: clock: New bindings for TI Davinci PSC
clk: davinci: Add platform information for TI DM646x PLL
clk: davinci: Add platform information for TI DM644x PLL
clk: davinci: Add platform information for TI DM365 PLL
clk: davinci: Add platform information for TI DM355 PLL
clk: davinci: Add platform information for TI DA850 PLL
clk: davinci: Add platform information for TI DA830 PLL
clk: davinci: New driver for davinci PLL clocks
dt-bindings: clock: Add new bindings for TI Davinci PLL clocks
* clk-si544:
clk: Add driver for the si544 clock generator chip
* clk-rockchip:
clk: rockchip: assign correct id for pclk_ddr and hclk_sd in rk3399
clk: rockchip: Fix error return in phase clock registration
clk: rockchip: Correct the behaviour of restoring cached phase
clk: rockchip: Fix wrong parents for MMC phase clock for rk3328
clk: rockchip: Fix wrong parent for SDMMC phase clock for rk3228
clk: rockchip: Add 1.6GHz PLL rate for rk3399
clk: rockchip: Restore the clock phase after the rate was changed
clk: rockchip: Prevent calculating mmc phase if clock rate is zero
clk: rockchip: Free the memory on the error path
clk: rockchip: document hdmi_phy external input for rk3328
clk: rockchip: add flags for rk3328 dclk_lcdc
clk: rockchip: remove ignore_unused flag from rk3328 vio_h2p clocks
clk: rockchip: protect all remaining rk3328 interconnect clocks
clk: rockchip: export sclk_hdmi_sfc on rk3328
clk: rockchip: remove HCLK_VIO from rk3328 dt header
clk: rockchip: fix hclk_vio_niu on rk3328
* clk-uniphier:
clk: uniphier: add additional ethernet clock lines for Pro4
clk: uniphier: add SATA clock control support
clk: uniphier: add PCIe clock control support
clk: uniphier: add ethernet clock control support for PXs3
clk: uniphier: add Pro4/Pro5/PXs2 audio system clock
* clk-ti-flag-fix:
clk: ti: fix flag space conflict with clkctrl clocks
clk: ti: clkctrl: add support for CLK_SET_RATE_PARENT flag
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This clock is not hclk_vio but hclk_vio_niu, the clock for the interconnect
output. The clock got fixed and the id was never used in this incorrect form,
so remove it.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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This adds a new driver for the gate and multiplexer clocks in the
CFGCHIPn syscon registers on TI DA8XX-type SoCs.
Signed-off-by: David Lechner <david@lechnology.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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This adds a new driver for mach-davinci PLL clocks. This is porting the
code from arch/arm/mach-davinci/clock.c to the common clock framework.
Additionally, it adds device tree support for these clocks.
The ifeq ($(CONFIG_COMMON_CLK), y) in the Makefile is needed to prevent
compile errors until the clock code in arch/arm/mach-davinci is removed.
Note: although there are similar clocks for TI Keystone we are not able
to share the code for a few reasons. The keystone clocks are device tree
only and use legacy one-node-per-clock bindings. Also the register
layouts are a bit different, which would add even more if/else mess
to the keystone clocks. And the keystone PLL driver doesn't support
setting clock rates.
Signed-off-by: David Lechner <david@lechnology.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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'clk-renesas' into clk-next
* clk-mediatek:
clk: mediatek: add audsys support for MT2701
clk: mediatek: add devm_of_platform_populate() for MT7622 audsys
dt-bindings: clock: mediatek: add audsys support for MT2701
dt-bindings: clock: mediatek: update audsys documentation to adapt MFD device
clk: mediatek: update missing clock data for MT7622 audsys
clk: mediatek: fix PWM clock source by adding a fixed-factor clock
dt-bindings: clock: mediatek: add binding for fixed-factor clock axisel_d4
* clk-hisi:
clk: hisilicon: fix potential NULL dereference in hisi_clk_alloc()
clk: hisilicon: mark wdt_mux_p[] as const
clk: hisilicon: Mark phase_ops static
clk: hi3798cv200: add emmc sample and drive clock
clk: hisilicon: add hisi phase clock support
clk: hi3798cv200: add COMBPHY0 clock support
clk: hi3798cv200: fix define indentation
clk: hi3798cv200: add support for HISTB_USB2_OTG_UTMI_CLK
clk: hi3798cv200: correct IR clock parent
clk: hi3798cv200: fix unregister call sequence in error path
* clk-allwinner:
clk: sunxi-ng: add missing hdmi-slow clock for H6 CCU
clk: sunxi-ng: add support for the Allwinner H6 CCU
dt-bindings: add device tree binding for Allwinner H6 main CCU
clk: sunxi-ng: Support fixed post-dividers on NKMP style clocks
clk: sunxi-ng: h3: h5: export CLK_PLL_VIDEO
clk: sunxi-ng: h3: h5: Allow some clocks to set parent rate
clk: sunxi-ng: h3: h5: Add minimal rate for video PLL
clk: sunxi-ng: Add check for minimal rate to NM PLLs
clk: sunxi-ng: Use u64 for calculation of nkmp rate
clk: sunxi-ng: Mask nkmp factors when setting register
clk: sunxi-ng: remove select on obsolete SUNXI_CCU_X kconfig name
* clk-ux500:
clk: ux500: Drop AB8540/9540 support
* clk-renesas: (27 commits)
clk: renesas: cpg-mssr: Adjust r8a77980 ifdef
clk: renesas: rcar-gen3: Always use readl()/writel()
clk: renesas: sh73a0: Always use readl()/writel()
clk: renesas: rza1: Always use readl()/writel()
clk: renesas: rcar-gen2: Always use readl()/writel()
clk: renesas: r8a7740: Always use readl()/writel()
clk: renesas: r8a73a4: Always use readl()/writel()
clk: renesas: mstp: Always use readl()/writel()
clk: renesas: div6: Always use readl()/writel()
clk: fix false-positive Wmaybe-uninitialized warning
clk: renesas: r8a77965: Replace DU2 clock
clk: renesas: cpg-mssr: Add support for R-Car M3-N
clk: renesas: cpg-mssr: add R8A77980 support
dt-bindings: clock: add R8A77980 CPG core clock definitions
clk: renesas: r8a7792: Add rwdt clock
clk: renesas: r8a7794: Add rwdt clock
clk: renesas: r8a7791/r8a7793: Add rwdt clock
clk: renesas: r8a7790: Add rwdt clock
clk: renesas: r8a7745: Add rwdt clock
clk: renesas: r8a7743: Add rwdt clock
...
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Initial support for R-Car M3-N (r8a77965), including core and module
clocks.
Based on Table 8.2d of "R-Car Series, 3rd Generation User's Manual:
Hardware (Rev. 0.80, Oct 31, 2017)".
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Add macros usable by the device tree sources to reference the R8A77980
CPG core clocks by index. The data come from the table 8.2e of the R-Car
Series, 3rd Generation User's Manual: Hardware (Rev. 0.80, Oct, 2017),
however I had to add the Z2 clock which is somehow present only on the
figure 8.1e...
Based on the original (and large) patch by Vladimir Barinov.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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The Allwinner H6 CCU has a "HDMI Slow Clock", which is currently missing
in the ccu-sun50i-h6 driver.
Add this missing clock to the driver.
Fixes: 542353ea ("clk: sunxi-ng: add support for the Allwinner H6 CCU")
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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The Allwinner H6 SoC has a CCU which has been largely rearranged.
Add support for it in the sunxi-ng CCU framework.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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CLK_PLL_VIDEO needs to be referenced in HDMI DT entry as a possible
PHY clock parent.
Export it so it can be used later in DT.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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The clock COMBPHY1 has already been supported by hi3798cv200 driver,
but COMBPHY0 is missing. It adds COMBPHY0 clock support.
Since the mux table is being shared by COMBPHY0 and COMBPHY1, it renames
comphy1_mux_p and comphy1_mux_table a bit to drop instance number '1'
from there.
Signed-off-by: Jianguo Sun <sunjianguo1@huawei.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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It's a coding-style fix, which corrects the indentation for all those
clock definitions, so that the code looks nicer and new definitions can
be added with a recommended indentation.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Add missing clock data 'CLK_AUDIO_AFE_CONN' for MT7622 audsys.
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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Just add binding for a fixed-factor clock axisel_d4, which would be
referenced by PWM devices on MT7623 or MT2701 SoC.
Cc: stable@vger.kernel.org
Fixes: 1de9b21633d6 ("clk: mediatek: Add dt-bindings for MT2701 clocks")
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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'clk-qcom-rpmcc' into clk-next
* clk-mvebu:
clk: mvebu: armada-38x: add support for missing clocks
clk: mvebu: cp110: Fix clock tree representation
* clk-phase:
clk: Don't show the incorrect clock phase
clk: update cached phase to respect the fact when setting phase
* clk-nxp:
clk: lpc32xx: Set name of regmap_config
* clk-mtk2712:
clk: mediatek: update clock driver of MT2712
dt-bindings: clock: add clocks for MT2712
* clk-qcom-rpmcc:
clk: qcom: rpmcc: Add support to XO buffered clocks
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XO is onchip buffer clock to generate 19.2MHz.
This patch adds support to 5 XO buffer clocks found on PMIC8921,
these buffer clocks can be controlled from external pin or in
manual mode.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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add new clocks according to ECO design change
Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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and 'clk-gpio' into clk-next
* clk-spreadtrum:
clk: sprd: add RTC gate for SC9860
dt-bindings: clocks: add APB RTC gate for SC9860
* clk-stm32f:
clk: stm32: Add clk entry for SDMMC2 on stm32F769
clk: stm32: Add DSI clock for STM32F469 Board
clk: stm32: END_PRIMARY_CLK should be declare after CLK_SYSCLK
* clk-stm32mp1:
clk: stm32: add configuration flags for each of the stm32 drivers
clk: stm32mp1: add Debug clocks
clk: stm32mp1: add MCO clocks
clk: stm32mp1: add RTC clock
clk: stm32mp1: add Peripheral & Kernel Clocks
clk: stm32mp1: add Kernel timers
clk: stm32mp1: add Sub System clocks
clk: stm32mp1: add Post-dividers for PLL
clk: stm32mp1: add PLL clocks
clk: stm32mp1: add Source Clocks for PLLs
clk: stm32mp1: add MP1 gate for hse/hsi/csi oscillators
clk: stm32mp1: Introduce STM32MP1 clock driver
dt-bindings: Document STM32MP1 Reset Clock Controller (RCC) bindings
* clk-hi655x:
clk: enable hi655x common clk automatically
* clk-gpio:
clk: clk-gpio: Allow GPIO to sleep in set/get_parent
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This patch introduces the mechanism to probe stm32mp1 driver.
It also defines registers definition.
This patch also introduces the generic mechanism to register
a clock (a simple gate, divider and fixed factor).
All clocks will be defined in one table.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
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This patch adds DSI clock for STM32F469 board
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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Update of END_PRIMARY_CLK was missed, it should be after CLK_SYSCLK
hsi and sysclk are overwritten by gpioa and gpiob.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Tested-by: Philippe Cornu <philippe.cornu@st.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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Added index of RTC gate clocks which are used by some devices on aon
area of SC9860, for example the Watchdog timer.
Signed-off-by: Chunyan Zhang <chunyan.zhang@spreadtrum.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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'clk-debugfs' into clk-next
* clk-versatile:
clk: versatile: Remove WARNs in ->round_rate()
clk: versatile: add min/max rate boundaries for vexpress osc clock
* clk-doc:
Documentation: clk: enable lock is not held for clk_is_enabled API
* clk-must-check:
clk: add more __must_check for bulk APIs
* clk-qcom:
clk: qcom: smd-rpm: Migrate to devm_of_clk_add_hw_provider()
clk: qcom: gcc-msm8996: Mark aggre0 noc clks as critical
* clk-debugfs:
clk: Re-use DEFINE_SHOW_ATTRIBUTE() macro
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we need it even when !CONFIG_HAVE_CLK because it allows
us to catch missing checking return values in the non-clk
compile configurations too. More test coverage.
Cc: Stephen Boyd <sboyd@codeaurora.org>
Suggested-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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clk-next
* clk-ti:
clk: keystone: sci-clk: add support for dynamically probing clocks
clk: ti: add support for clock latching to mux clocks
clk: ti: add support for clock latching to divider clocks
clk: ti: add generic support for clock latching
clk: ti: add support for register read-modify-write low-level operation
dt-bindings: clock: ti: add latching support to mux and divider clocks
* clk-amlogic: (50 commits)
clk: meson: Drop unused local variable and add static
clk: meson: clean-up clk81 clocks
clk: meson: add fdiv clock gates
clk: meson: add mpll pre-divider
clk: meson: axg: add hifi pll clock
clk: meson: axg: add hifi clock bindings
clk: meson: add ROUND_CLOSEST to the pll driver
clk: meson: add gp0 frac parameter for axg and gxl
clk: meson: improve pll driver results with frac
clk: meson: remove special gp0 lock loop
clk: meson: poke pll CNTL last
clk: meson: add fractional part of meson8b fixed_pll
clk: meson: use hhi syscon if available
clk: meson: remove obsolete cpu_clk
clk: meson: rework meson8b cpu clock
clk: meson: split divider and gate part of mpll
clk: meson: migrate plls clocks to clk_regmap
clk: meson: migrate the audio divider clock to clk_regmap
clk: meson: migrate mplls clocks to clk_regmap
clk: meson: add regmap helpers for parm
...
* clk-tegra:
clk: tegra: Fix pll_u rate configuration
clk: tegra: Specify VDE clock rate
clk: tegra20: Correct PLL_C_OUT1 setup
clk: tegra: Mark HCLK, SCLK and EMC as critical
clk: tegra: MBIST work around for Tegra210
clk: tegra: add fence_delay for clock registers
clk: tegra: Add la clock for Tegra210
* clk-samsung: (22 commits)
clk: samsung: Mark a few things static
clk: samsung: Add fout=196608001 Hz EPLL rate entry for exynos4412
clk: samsung: exynos5250: Add missing clocks for FIMC LITE SYSMMU devices
clk: samsung: exynos5420: Add more entries to EPLL rate table
clk: samsung: exynos5420: Add CLK_SET_RATE_PARENT flag to mout_mau_epll_clk
clk: samsung: exynos5250: Move PD-dependent clocks to Exynos5 sub-CMU
clk: samsung: exynos5420: Move PD-dependent clocks to Exynos5 sub-CMU
clk: samsung: Add Exynos5 sub-CMU clock driver
soc: samsung: pm_domains: Add blacklisting clock handling
clk: samsung: Add compile time PLL rate validators
clk: samsung: s3c2410: Fix PLL rates
clk: samsung: exynos7: Fix PLL rates
clk: samsung: exynos5433: Fix PLL rates
clk: samsung: exynos5260: Fix PLL rates
clk: samsung: exynos5250: Fix PLL rates
clk: samsung: exynos3250: Fix PLL rates
clk: exynos5433: Extend list of available AUD_PLL output frequencies
clk: exynos5433: Add CLK_IGNORE_UNUSED flag to sclk_ioclk_i2s1_bclk
clk: samsung: Add a git tree entry to MAINTAINERS
clk: samsung: Remove redundant dev_err call in exynos_audss_clk_probe()
...
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Tegra210 has a hw bug which can cause IP blocks to lock up when ungating a
domain. The reason is that the logic responsible for resetting the memory
built-in self test mode can come up in an undefined state because its
clock is gated by a second level clock gate (SLCG). Work around this by
making sure the logic will get some clock edges by ensuring the relevant
clock is enabled and temporarily override the relevant SLCGs.
Unfortunately for some IP blocks, the control bits for overriding the
SLCGs are not in CAR, but in the IP block itself. This means we need to
map a few extra register banks in the clock code.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Tested-by: Hector Martin <marcan@marcan.st>
Tested-by: Andre Heider <a.heider@gmail.com>
Tested-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
fixup mbist
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This clock is needed by the memory built-in self test work around.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Tested-by: Hector Martin <marcan@marcan.st>
Tested-by: Andre Heider <a.heider@gmail.com>
Tested-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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