From 84ace6741bd9b957d3b6dc39fe63fee0f1bd5039 Mon Sep 17 00:00:00 2001 From: Tomi Valkeinen Date: Thu, 4 Sep 2014 09:28:32 +0300 Subject: ARM: dts: omap5.dtsi: add DSS RFBI node The RFBI node for OMAP DSS was left out when adding the rest of the DSS nodes, because it was not clear how to set up the clocks for the RFBI. However, it seems that if there is a HWMOD for a device, we also need a DT node for it. Otherwise, at boot, we get: WARNING: CPU: 0 PID: 1 at arch/arm/mach-omap2/omap_hwmod.c:2542 _init+0x464/0x4e0() omap_hwmod: dss_rfbi: doesn't have mpu register target base Now that v3.17-rc3 contains a fix 8fd46439e1f5 ("ARM: dts: omap54xx-clocks: Fix the l3 and l4 clock rates") for the L3 ICLK required by the RFBI, let's add the RFBI node to get rid of the warning. Signed-off-by: Tomi Valkeinen [tony@atomide.com: updated description per comments from Nishant] Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/omap5.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'arch/arm/boot/dts/omap5.dtsi') diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi index fc8df1739f39..1e6ff61a7f12 100644 --- a/arch/arm/boot/dts/omap5.dtsi +++ b/arch/arm/boot/dts/omap5.dtsi @@ -945,6 +945,15 @@ clock-names = "fck"; }; + rfbi: encoder@58002000 { + compatible = "ti,omap5-rfbi"; + reg = <0x58002000 0x100>; + status = "disabled"; + ti,hwmods = "dss_rfbi"; + clocks = <&dss_dss_clk>, <&l3_iclk_div>; + clock-names = "fck", "ick"; + }; + dsi1: encoder@58004000 { compatible = "ti,omap5-dsi"; reg = <0x58004000 0x200>, -- cgit v1.2.3 From 924c31cc688231292119aa1bdbf7ce349c42ca49 Mon Sep 17 00:00:00 2001 From: Nishanth Menon Date: Fri, 23 May 2014 00:58:08 -0500 Subject: ARM: dts: OMAP5: switch to compatible pinctrl Now that ti,omap5-padconf is available, switch over to that compatible property. Retain pinctrl-single for legacy support. While at it, mark pinctrl as interrupt controller so that it can be used with interrupts-extended property for wakeup events. Signed-off-by: Nishanth Menon --- arch/arm/boot/dts/omap5.dtsi | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) (limited to 'arch/arm/boot/dts/omap5.dtsi') diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi index fc8df1739f39..ea08ad874f82 100644 --- a/arch/arm/boot/dts/omap5.dtsi +++ b/arch/arm/boot/dts/omap5.dtsi @@ -187,18 +187,22 @@ }; omap5_pmx_core: pinmux@4a002840 { - compatible = "ti,omap4-padconf", "pinctrl-single"; + compatible = "ti,omap5-padconf", "pinctrl-single"; reg = <0x4a002840 0x01b6>; #address-cells = <1>; #size-cells = <0>; + #interrupt-cells = <1>; + interrupt-controller; pinctrl-single,register-width = <16>; pinctrl-single,function-mask = <0x7fff>; }; omap5_pmx_wkup: pinmux@4ae0c840 { - compatible = "ti,omap4-padconf", "pinctrl-single"; + compatible = "ti,omap5-padconf", "pinctrl-single"; reg = <0x4ae0c840 0x0038>; #address-cells = <1>; #size-cells = <0>; + #interrupt-cells = <1>; + interrupt-controller; pinctrl-single,register-width = <16>; pinctrl-single,function-mask = <0x7fff>; }; -- cgit v1.2.3 From e2265abe7a18e5e6880d0cd35e2db08bcd237366 Mon Sep 17 00:00:00 2001 From: Nishanth Menon Date: Fri, 23 May 2014 00:04:02 -0500 Subject: ARM: dts: OMAP5 / DRA7: switch over to interrupts-extended property for UART We've had deeper idle states working on omaps for few years now, but only in the legacy mode. When booted with device tree, the wake-up events did not have a chance to work until commit 3e6cee1786a1 ("pinctrl: single: Add support for wake-up interrupts") that recently got merged. In addition to that we also needed commit 79d9701559a9 ("of/irq: create interrupts-extended property") that's now also merged. Note that there's no longer need to specify the wake-up bit in the pinctrl settings, the request_irq on the wake-up pin takes care of that. Signed-off-by: Nishanth Menon --- arch/arm/boot/dts/dra7.dtsi | 20 ++++++++++---------- arch/arm/boot/dts/omap5.dtsi | 12 ++++++------ 2 files changed, 16 insertions(+), 16 deletions(-) (limited to 'arch/arm/boot/dts/omap5.dtsi') diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index f8654a8b6aa2..4e50deaa0fb6 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -330,7 +330,7 @@ uart1: serial@4806a000 { compatible = "ti,omap4-uart"; reg = <0x4806a000 0x100>; - interrupts = ; + interrupts-extended = <&gic GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart1"; clock-frequency = <48000000>; status = "disabled"; @@ -339,7 +339,7 @@ uart2: serial@4806c000 { compatible = "ti,omap4-uart"; reg = <0x4806c000 0x100>; - interrupts = ; + interrupts-extended = <&gic GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart2"; clock-frequency = <48000000>; status = "disabled"; @@ -348,7 +348,7 @@ uart3: serial@48020000 { compatible = "ti,omap4-uart"; reg = <0x48020000 0x100>; - interrupts = ; + interrupts-extended = <&gic GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart3"; clock-frequency = <48000000>; status = "disabled"; @@ -357,7 +357,7 @@ uart4: serial@4806e000 { compatible = "ti,omap4-uart"; reg = <0x4806e000 0x100>; - interrupts = ; + interrupts-extended = <&gic GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart4"; clock-frequency = <48000000>; status = "disabled"; @@ -366,7 +366,7 @@ uart5: serial@48066000 { compatible = "ti,omap4-uart"; reg = <0x48066000 0x100>; - interrupts = ; + interrupts-extended = <&gic GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart5"; clock-frequency = <48000000>; status = "disabled"; @@ -375,7 +375,7 @@ uart6: serial@48068000 { compatible = "ti,omap4-uart"; reg = <0x48068000 0x100>; - interrupts = ; + interrupts-extended = <&gic GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart6"; clock-frequency = <48000000>; status = "disabled"; @@ -384,7 +384,7 @@ uart7: serial@48420000 { compatible = "ti,omap4-uart"; reg = <0x48420000 0x100>; - interrupts = ; + interrupts-extended = <&gic GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart7"; clock-frequency = <48000000>; status = "disabled"; @@ -393,7 +393,7 @@ uart8: serial@48422000 { compatible = "ti,omap4-uart"; reg = <0x48422000 0x100>; - interrupts = ; + interrupts-extended = <&gic GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart8"; clock-frequency = <48000000>; status = "disabled"; @@ -402,7 +402,7 @@ uart9: serial@48424000 { compatible = "ti,omap4-uart"; reg = <0x48424000 0x100>; - interrupts = ; + interrupts-extended = <&gic GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart9"; clock-frequency = <48000000>; status = "disabled"; @@ -411,7 +411,7 @@ uart10: serial@4ae2b000 { compatible = "ti,omap4-uart"; reg = <0x4ae2b000 0x100>; - interrupts = ; + interrupts-extended = <&gic GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart10"; clock-frequency = <48000000>; status = "disabled"; diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi index ea08ad874f82..b840db0d16d1 100644 --- a/arch/arm/boot/dts/omap5.dtsi +++ b/arch/arm/boot/dts/omap5.dtsi @@ -451,7 +451,7 @@ uart1: serial@4806a000 { compatible = "ti,omap4-uart"; reg = <0x4806a000 0x100>; - interrupts = ; + interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart1"; clock-frequency = <48000000>; }; @@ -459,7 +459,7 @@ uart2: serial@4806c000 { compatible = "ti,omap4-uart"; reg = <0x4806c000 0x100>; - interrupts = ; + interrupts-extended = <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart2"; clock-frequency = <48000000>; }; @@ -467,7 +467,7 @@ uart3: serial@48020000 { compatible = "ti,omap4-uart"; reg = <0x48020000 0x100>; - interrupts = ; + interrupts-extended = <&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart3"; clock-frequency = <48000000>; }; @@ -475,7 +475,7 @@ uart4: serial@4806e000 { compatible = "ti,omap4-uart"; reg = <0x4806e000 0x100>; - interrupts = ; + interrupts-extended = <&gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart4"; clock-frequency = <48000000>; }; @@ -483,7 +483,7 @@ uart5: serial@48066000 { compatible = "ti,omap4-uart"; reg = <0x48066000 0x100>; - interrupts = ; + interrupts-extended = <&gic GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart5"; clock-frequency = <48000000>; }; @@ -491,7 +491,7 @@ uart6: serial@48068000 { compatible = "ti,omap4-uart"; reg = <0x48068000 0x100>; - interrupts = ; + interrupts-extended = <&gic GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart6"; clock-frequency = <48000000>; }; -- cgit v1.2.3 From d27704d1ec2f9ba06247b402c58a6f2febecef78 Mon Sep 17 00:00:00 2001 From: Suman Anna Date: Wed, 10 Sep 2014 14:27:23 -0500 Subject: ARM: dts: OMAP2+: Add sub mailboxes device node information MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The sub-mailbox devices are added to the Mailbox DT nodes on OMAP2420, OMAP2430, OMAP3, AM33xx, AM43xx, OMAP4 and OMAP5 family of SoCs. This data represents the same mailboxes that used to be represented in hwmod attribute data previously. The node name is chosen based on the .name field of omap_mbox_dev_info structure used in the hwmod data. Cc: "Benoît Cousson" Cc: Rob Herring Cc: Pawel Moll Cc: Mark Rutland Cc: Ian Campbell Cc: Kumar Gala Signed-off-by: Suman Anna Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/am33xx.dtsi | 4 ++++ arch/arm/boot/dts/am4372.dtsi | 4 ++++ arch/arm/boot/dts/omap2420.dtsi | 8 ++++++++ arch/arm/boot/dts/omap2430.dtsi | 4 ++++ arch/arm/boot/dts/omap3.dtsi | 4 ++++ arch/arm/boot/dts/omap4.dtsi | 8 ++++++++ arch/arm/boot/dts/omap5.dtsi | 8 ++++++++ 7 files changed, 40 insertions(+) (limited to 'arch/arm/boot/dts/omap5.dtsi') diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi index 3a0a161342ba..e4f165a7833a 100644 --- a/arch/arm/boot/dts/am33xx.dtsi +++ b/arch/arm/boot/dts/am33xx.dtsi @@ -354,6 +354,10 @@ ti,hwmods = "mailbox"; ti,mbox-num-users = <4>; ti,mbox-num-fifos = <8>; + mbox_wkupm3: wkup_m3 { + ti,mbox-tx = <0 0 0>; + ti,mbox-rx = <0 0 3>; + }; }; timer1: timer@44e31000 { diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi index b3848306f329..2f7570e3d483 100644 --- a/arch/arm/boot/dts/am4372.dtsi +++ b/arch/arm/boot/dts/am4372.dtsi @@ -170,6 +170,10 @@ ti,hwmods = "mailbox"; ti,mbox-num-users = <4>; ti,mbox-num-fifos = <8>; + mbox_wkupm3: wkup_m3 { + ti,mbox-tx = <0 0 0>; + ti,mbox-rx = <0 0 3>; + }; }; timer1: timer@44e31000 { diff --git a/arch/arm/boot/dts/omap2420.dtsi b/arch/arm/boot/dts/omap2420.dtsi index 9be3c1266378..ae89aad01595 100644 --- a/arch/arm/boot/dts/omap2420.dtsi +++ b/arch/arm/boot/dts/omap2420.dtsi @@ -159,6 +159,14 @@ ti,hwmods = "mailbox"; ti,mbox-num-users = <4>; ti,mbox-num-fifos = <6>; + mbox_dsp: dsp { + ti,mbox-tx = <0 0 0>; + ti,mbox-rx = <1 0 0>; + }; + mbox_iva: iva { + ti,mbox-tx = <2 1 3>; + ti,mbox-rx = <3 1 3>; + }; }; timer1: timer@48028000 { diff --git a/arch/arm/boot/dts/omap2430.dtsi b/arch/arm/boot/dts/omap2430.dtsi index 1a00f15d9096..b56d71611026 100644 --- a/arch/arm/boot/dts/omap2430.dtsi +++ b/arch/arm/boot/dts/omap2430.dtsi @@ -249,6 +249,10 @@ ti,hwmods = "mailbox"; ti,mbox-num-users = <4>; ti,mbox-num-fifos = <6>; + mbox_dsp: dsp { + ti,mbox-tx = <0 0 0>; + ti,mbox-rx = <1 0 0>; + }; }; timer1: timer@49018000 { diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi index 575a49bf968d..b2ae8b8e54d6 100644 --- a/arch/arm/boot/dts/omap3.dtsi +++ b/arch/arm/boot/dts/omap3.dtsi @@ -334,6 +334,10 @@ interrupts = <26>; ti,mbox-num-users = <2>; ti,mbox-num-fifos = <2>; + mbox_dsp: dsp { + ti,mbox-tx = <0 0 0>; + ti,mbox-rx = <1 0 0>; + }; }; mcspi1: spi@48098000 { diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi index 69408b53200d..bc54d669f36d 100644 --- a/arch/arm/boot/dts/omap4.dtsi +++ b/arch/arm/boot/dts/omap4.dtsi @@ -656,6 +656,14 @@ ti,hwmods = "mailbox"; ti,mbox-num-users = <3>; ti,mbox-num-fifos = <8>; + mbox_ipu: mbox_ipu { + ti,mbox-tx = <0 0 0>; + ti,mbox-rx = <1 0 0>; + }; + mbox_dsp: mbox_dsp { + ti,mbox-tx = <3 0 0>; + ti,mbox-rx = <2 0 0>; + }; }; timer1: timer@4a318000 { diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi index 4bf3930a4a0e..30ce71add4ef 100644 --- a/arch/arm/boot/dts/omap5.dtsi +++ b/arch/arm/boot/dts/omap5.dtsi @@ -646,6 +646,14 @@ ti,hwmods = "mailbox"; ti,mbox-num-users = <3>; ti,mbox-num-fifos = <8>; + mbox_ipu: mbox_ipu { + ti,mbox-tx = <0 0 0>; + ti,mbox-rx = <1 0 0>; + }; + mbox_dsp: mbox_dsp { + ti,mbox-tx = <3 0 0>; + ti,mbox-rx = <2 0 0>; + }; }; timer1: timer@4ae18000 { -- cgit v1.2.3