From f36c4720fca325579faddc880d4e178e4ccbda88 Mon Sep 17 00:00:00 2001 From: Leonid Yegoshin Date: Tue, 4 Mar 2014 13:34:43 +0000 Subject: MIPS: Add support for the M5150 processor The M5150 core is a 32-bit MIPS RISC which implements the MIPS Architecture Release-5 in a 5-stage pipeline. In addition, it includes the MIPS Architecture Virtualization Module that enables virtualization of operating systems, which provides a scalable, trusted, and secure execution environment. Signed-off-by: Leonid Yegoshin Signed-off-by: Markos Chandras Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6596/ Signed-off-by: Ralf Baechle --- arch/mips/kernel/idle.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/mips/kernel/idle.c') diff --git a/arch/mips/kernel/idle.c b/arch/mips/kernel/idle.c index 04ea1c7a3d31..9f904eda5de5 100644 --- a/arch/mips/kernel/idle.c +++ b/arch/mips/kernel/idle.c @@ -188,6 +188,7 @@ void __init check_wait(void) case CPU_INTERAPTIV: case CPU_PROAPTIV: case CPU_P5600: + case CPU_M5150: cpu_wait = r4k_wait; if (read_c0_config7() & MIPS_CONF7_WII) cpu_wait = r4k_wait_irqoff; -- cgit v1.2.3