From 7e4dbdc11261bd7aaa18051247d01429e0b7cd03 Mon Sep 17 00:00:00 2001 From: Christoph Hellwig Date: Fri, 15 Jun 2018 13:08:32 +0200 Subject: MIPS: remove CONFIG_DMA_COHERENT We can just check for !CONFIG_DMA_NONCOHERENT instead and simplify things a lot. Signed-off-by: Christoph Hellwig Reviewed-by: Paul Burton Patchwork: https://patchwork.linux-mips.org/patch/19530/ Signed-off-by: Paul Burton Cc: Florian Fainelli Cc: David Daney Cc: Kevin Cernekee Cc: Jiaxun Yang Cc: Tom Bogendoerfer Cc: Huacai Chen Cc: iommu@lists.linux-foundation.org Cc: linux-mips@linux-mips.org --- arch/mips/mti-malta/malta-setup.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/mips/mti-malta/malta-setup.c') diff --git a/arch/mips/mti-malta/malta-setup.c b/arch/mips/mti-malta/malta-setup.c index 7b63914d2e58..4d5cdfeee3db 100644 --- a/arch/mips/mti-malta/malta-setup.c +++ b/arch/mips/mti-malta/malta-setup.c @@ -227,7 +227,7 @@ static void __init bonito_quirks_setup(void) } else BONITO_BONGENCFG &= ~BONITO_BONGENCFG_DEBUGMODE; -#ifdef CONFIG_DMA_COHERENT +#ifndef CONFIG_DMA_NONCOHERENT if (BONITO_PCICACHECTRL & BONITO_PCICACHECTRL_CPUCOH_PRES) { BONITO_PCICACHECTRL |= BONITO_PCICACHECTRL_CPUCOH_EN; pr_info("Enabled Bonito CPU coherency\n"); @@ -279,7 +279,7 @@ void __init plat_mem_setup(void) */ enable_dma(4); -#ifdef CONFIG_DMA_COHERENT +#ifndef CONFIG_DMA_NONCOHERENT if (mips_revision_sconid != MIPS_REVISION_SCON_BONITO) panic("Hardware DMA cache coherency not supported"); #endif -- cgit v1.2.3