From 3a36044e7f3909c7ddb7ddfc727ab8104a563439 Mon Sep 17 00:00:00 2001 From: Alexandre Mergnat Date: Thu, 25 Jul 2019 18:42:36 +0200 Subject: clk: meson: clk-regmap: migrate to new parent description method This clock controller use the string comparison method to describe parent relation between the clocks, which is not optimized. Migrate to the new way by using .parent_hws where possible (ie. when all clocks are local to the controller) and use .parent_data otherwise. Signed-off-by: Alexandre Mergnat Signed-off-by: Jerome Brunet --- drivers/clk/meson/axg.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'drivers/clk/meson/axg.c') diff --git a/drivers/clk/meson/axg.c b/drivers/clk/meson/axg.c index 7a3d795cc614..13fc0006f63d 100644 --- a/drivers/clk/meson/axg.c +++ b/drivers/clk/meson/axg.c @@ -1096,6 +1096,9 @@ static struct clk_regmap axg_gen_clk = { }, }; +#define MESON_GATE(_name, _reg, _bit) \ + MESON_PCLK(_name, _reg, _bit, &axg_clk81.hw) + /* Everything Else (EE) domain gates */ static MESON_GATE(axg_ddr, HHI_GCLK_MPEG0, 0); static MESON_GATE(axg_audio_locker, HHI_GCLK_MPEG0, 2); -- cgit v1.2.3