From 60c46877e9cd4f7fd13fa844258f60cca4eb3e34 Mon Sep 17 00:00:00 2001 From: Anup Patel Date: Mon, 10 Jul 2023 18:49:02 +0530 Subject: clocksource: timer-riscv: Increase rating of clock_event_device for Sstc When Sstc is available the RISC-V timer clock_event_device should be the preferred clock_event_device hence we increase clock_event_device rating for Sstc. Signed-off-by: Anup Patel Reviewed-by: Conor Dooley Acked-by: Palmer Dabbelt Link: https://lore.kernel.org/r/20230710131902.1459180-3-apatel@ventanamicro.com Signed-off-by: Palmer Dabbelt --- drivers/clocksource/timer-riscv.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'drivers/clocksource') diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c index f2ea2b3d2d43..9c8f3e2decc2 100644 --- a/drivers/clocksource/timer-riscv.c +++ b/drivers/clocksource/timer-riscv.c @@ -105,6 +105,8 @@ static int riscv_timer_starting_cpu(unsigned int cpu) ce->irq = riscv_clock_event_irq; if (riscv_timer_cannot_wake_cpu) ce->features |= CLOCK_EVT_FEAT_C3STOP; + if (static_branch_likely(&riscv_sstc_available)) + ce->rating = 450; clockevents_config_and_register(ce, riscv_timebase, 100, 0x7fffffff); enable_percpu_irq(riscv_clock_event_irq, -- cgit v1.2.3