From d071fd294f2474118629f4021a6a3dedef28e09f Mon Sep 17 00:00:00 2001 From: Mao Wenan Date: Wed, 14 Aug 2019 15:21:05 +0800 Subject: dmaengine: change alignment of mux_configure32 and fsl_edma_chan_mux The alignment of mux_configure32() and fsl_edma_chan_mux() need to be adjusted, it must start precisely at the first column after the openning parenthesis of the first line. Fixes: 9d831528a656 ("dmaengine: fsl-edma: extract common fsl-edma code (no changes in behavior intended)") Signed-off-by: Mao Wenan Link: https://lore.kernel.org/r/20190814072105.144107-3-maowenan@huawei.com Signed-off-by: Vinod Koul --- drivers/dma/fsl-edma-common.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers/dma/fsl-edma-common.c') diff --git a/drivers/dma/fsl-edma-common.c b/drivers/dma/fsl-edma-common.c index 264c448de409..b1a7ca91701a 100644 --- a/drivers/dma/fsl-edma-common.c +++ b/drivers/dma/fsl-edma-common.c @@ -91,7 +91,7 @@ static void mux_configure8(struct fsl_edma_chan *fsl_chan, void __iomem *addr, } static void mux_configure32(struct fsl_edma_chan *fsl_chan, void __iomem *addr, - u32 off, u32 slot, bool enable) + u32 off, u32 slot, bool enable) { u32 val; @@ -104,7 +104,7 @@ static void mux_configure32(struct fsl_edma_chan *fsl_chan, void __iomem *addr, } void fsl_edma_chan_mux(struct fsl_edma_chan *fsl_chan, - unsigned int slot, bool enable) + unsigned int slot, bool enable) { u32 ch = fsl_chan->vchan.chan.chan_id; void __iomem *muxaddr; -- cgit v1.2.3