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authorHang Li <lihang48@hisilicon.com>2019-11-28 12:03:21 +0100
committerluo rixin <luorixin@huawei.com>2020-03-10 08:19:00 +0100
commit241bb59a55fa079b966d9c5c5b16eb4699b12ea0 (patch)
tree44bed135a75a330aeba53baa8a6ea48f569677bc /src/erasure-code
parentMerge pull request #33281 from ideepika/wip-set-osd-pool-size-extra-param-check (diff)
downloadceph-241bb59a55fa079b966d9c5c5b16eb4699b12ea0.tar.xz
ceph-241bb59a55fa079b966d9c5c5b16eb4699b12ea0.zip
erasure-code: enable isa-l EC for aarch64 platform
add compile options to support erasure-code on aarch64 platform. Signed-off-by: Hang Li <lihang48@hisilicon.com> Signed-off-by: luo rixin <luorixin@huawei.com>
Diffstat (limited to 'src/erasure-code')
-rw-r--r--src/erasure-code/CMakeLists.txt4
-rw-r--r--src/erasure-code/isa/CMakeLists.txt139
2 files changed, 86 insertions, 57 deletions
diff --git a/src/erasure-code/CMakeLists.txt b/src/erasure-code/CMakeLists.txt
index bd9b00460b4..9cdc62e7dcb 100644
--- a/src/erasure-code/CMakeLists.txt
+++ b/src/erasure-code/CMakeLists.txt
@@ -22,10 +22,10 @@ add_subdirectory(lrc)
add_subdirectory(shec)
add_subdirectory(clay)
-if (HAVE_BETTER_YASM_ELF64)
+if(HAVE_BETTER_YASM_ELF64 OR HAVE_ARMV8_SIMD)
add_subdirectory(isa)
set(EC_ISA_LIB ec_isa)
-endif (HAVE_BETTER_YASM_ELF64)
+endif()
add_library(erasure_code STATIC ErasureCodePlugin.cc)
target_link_libraries(erasure_code ${CMAKE_DL_LIBS})
diff --git a/src/erasure-code/isa/CMakeLists.txt b/src/erasure-code/isa/CMakeLists.txt
index cc489211253..5043ac225dc 100644
--- a/src/erasure-code/isa/CMakeLists.txt
+++ b/src/erasure-code/isa/CMakeLists.txt
@@ -2,61 +2,90 @@
set(isal_src_dir ${CMAKE_SOURCE_DIR}/src/isa-l)
include_directories(${isal_src_dir}/include)
-set(isa_srcs
- ${isal_src_dir}/erasure_code/ec_base.c
- ${isal_src_dir}/erasure_code/gf_2vect_dot_prod_sse.asm
- ${isal_src_dir}/erasure_code/gf_3vect_dot_prod_sse.asm
- ${isal_src_dir}/erasure_code/gf_4vect_dot_prod_sse.asm
- ${isal_src_dir}/erasure_code/gf_5vect_dot_prod_sse.asm
- ${isal_src_dir}/erasure_code/gf_6vect_dot_prod_sse.asm
- ${isal_src_dir}/erasure_code/gf_vect_dot_prod_sse.asm
- ${isal_src_dir}/erasure_code/gf_2vect_mad_avx2.asm
- ${isal_src_dir}/erasure_code/gf_3vect_mad_avx2.asm
- ${isal_src_dir}/erasure_code/gf_4vect_mad_avx2.asm
- ${isal_src_dir}/erasure_code/gf_5vect_mad_avx2.asm
- ${isal_src_dir}/erasure_code/gf_6vect_mad_avx2.asm
- ${isal_src_dir}/erasure_code/gf_vect_mad_avx2.asm
- ${isal_src_dir}/erasure_code/ec_highlevel_func.c
- ${isal_src_dir}/erasure_code/gf_2vect_mad_avx.asm
- ${isal_src_dir}/erasure_code/gf_3vect_mad_avx.asm
- ${isal_src_dir}/erasure_code/gf_4vect_mad_avx.asm
- ${isal_src_dir}/erasure_code/gf_5vect_mad_avx.asm
- ${isal_src_dir}/erasure_code/gf_6vect_mad_avx.asm
- ${isal_src_dir}/erasure_code/gf_vect_mad_avx.asm
- ${isal_src_dir}/erasure_code/ec_multibinary.asm
- ${isal_src_dir}/erasure_code/gf_2vect_mad_sse.asm
- ${isal_src_dir}/erasure_code/gf_3vect_mad_sse.asm
- ${isal_src_dir}/erasure_code/gf_4vect_mad_sse.asm
- ${isal_src_dir}/erasure_code/gf_5vect_mad_sse.asm
- ${isal_src_dir}/erasure_code/gf_6vect_mad_sse.asm
- ${isal_src_dir}/erasure_code/gf_vect_mad_sse.asm
- ${isal_src_dir}/erasure_code/gf_2vect_dot_prod_avx2.asm
- ${isal_src_dir}/erasure_code/gf_3vect_dot_prod_avx2.asm
- ${isal_src_dir}/erasure_code/gf_4vect_dot_prod_avx2.asm
- ${isal_src_dir}/erasure_code/gf_5vect_dot_prod_avx2.asm
- ${isal_src_dir}/erasure_code/gf_6vect_dot_prod_avx2.asm
- ${isal_src_dir}/erasure_code/gf_vect_dot_prod_avx2.asm
- ${isal_src_dir}/erasure_code/gf_vect_mul_avx.asm
- ${isal_src_dir}/erasure_code/gf_2vect_dot_prod_avx.asm
- ${isal_src_dir}/erasure_code/gf_3vect_dot_prod_avx.asm
- ${isal_src_dir}/erasure_code/gf_4vect_dot_prod_avx.asm
- ${isal_src_dir}/erasure_code/gf_5vect_dot_prod_avx.asm
- ${isal_src_dir}/erasure_code/gf_6vect_dot_prod_avx.asm
- ${isal_src_dir}/erasure_code/gf_vect_dot_prod_avx.asm
- ${isal_src_dir}/erasure_code/gf_vect_mul_sse.asm
- ${isal_src_dir}/erasure_code/gf_2vect_dot_prod_avx512.asm
- ${isal_src_dir}/erasure_code/gf_2vect_mad_avx512.asm
- ${isal_src_dir}/erasure_code/gf_3vect_dot_prod_avx512.asm
- ${isal_src_dir}/erasure_code/gf_3vect_mad_avx512.asm
- ${isal_src_dir}/erasure_code/gf_4vect_dot_prod_avx512.asm
- ${isal_src_dir}/erasure_code/gf_4vect_mad_avx512.asm
- ${isal_src_dir}/erasure_code/gf_vect_dot_prod_avx512.asm
- ${isal_src_dir}/erasure_code/gf_vect_mad_avx512.asm
- ErasureCodeIsa.cc
- ErasureCodeIsaTableCache.cc
- ErasureCodePluginIsa.cc
- xor_op.cc
-)
+if(HAVE_BETTER_YASM_ELF64)
+ set(isa_srcs
+ ${isal_src_dir}/erasure_code/ec_base.c
+ ${isal_src_dir}/erasure_code/gf_2vect_dot_prod_sse.asm
+ ${isal_src_dir}/erasure_code/gf_3vect_dot_prod_sse.asm
+ ${isal_src_dir}/erasure_code/gf_4vect_dot_prod_sse.asm
+ ${isal_src_dir}/erasure_code/gf_5vect_dot_prod_sse.asm
+ ${isal_src_dir}/erasure_code/gf_6vect_dot_prod_sse.asm
+ ${isal_src_dir}/erasure_code/gf_vect_dot_prod_sse.asm
+ ${isal_src_dir}/erasure_code/gf_2vect_mad_avx2.asm
+ ${isal_src_dir}/erasure_code/gf_3vect_mad_avx2.asm
+ ${isal_src_dir}/erasure_code/gf_4vect_mad_avx2.asm
+ ${isal_src_dir}/erasure_code/gf_5vect_mad_avx2.asm
+ ${isal_src_dir}/erasure_code/gf_6vect_mad_avx2.asm
+ ${isal_src_dir}/erasure_code/gf_vect_mad_avx2.asm
+ ${isal_src_dir}/erasure_code/ec_highlevel_func.c
+ ${isal_src_dir}/erasure_code/gf_2vect_mad_avx.asm
+ ${isal_src_dir}/erasure_code/gf_3vect_mad_avx.asm
+ ${isal_src_dir}/erasure_code/gf_4vect_mad_avx.asm
+ ${isal_src_dir}/erasure_code/gf_5vect_mad_avx.asm
+ ${isal_src_dir}/erasure_code/gf_6vect_mad_avx.asm
+ ${isal_src_dir}/erasure_code/gf_vect_mad_avx.asm
+ ${isal_src_dir}/erasure_code/ec_multibinary.asm
+ ${isal_src_dir}/erasure_code/gf_2vect_mad_sse.asm
+ ${isal_src_dir}/erasure_code/gf_3vect_mad_sse.asm
+ ${isal_src_dir}/erasure_code/gf_4vect_mad_sse.asm
+ ${isal_src_dir}/erasure_code/gf_5vect_mad_sse.asm
+ ${isal_src_dir}/erasure_code/gf_6vect_mad_sse.asm
+ ${isal_src_dir}/erasure_code/gf_vect_mad_sse.asm
+ ${isal_src_dir}/erasure_code/gf_2vect_dot_prod_avx2.asm
+ ${isal_src_dir}/erasure_code/gf_3vect_dot_prod_avx2.asm
+ ${isal_src_dir}/erasure_code/gf_4vect_dot_prod_avx2.asm
+ ${isal_src_dir}/erasure_code/gf_5vect_dot_prod_avx2.asm
+ ${isal_src_dir}/erasure_code/gf_6vect_dot_prod_avx2.asm
+ ${isal_src_dir}/erasure_code/gf_vect_dot_prod_avx2.asm
+ ${isal_src_dir}/erasure_code/gf_vect_mul_avx.asm
+ ${isal_src_dir}/erasure_code/gf_2vect_dot_prod_avx.asm
+ ${isal_src_dir}/erasure_code/gf_3vect_dot_prod_avx.asm
+ ${isal_src_dir}/erasure_code/gf_4vect_dot_prod_avx.asm
+ ${isal_src_dir}/erasure_code/gf_5vect_dot_prod_avx.asm
+ ${isal_src_dir}/erasure_code/gf_6vect_dot_prod_avx.asm
+ ${isal_src_dir}/erasure_code/gf_vect_dot_prod_avx.asm
+ ${isal_src_dir}/erasure_code/gf_vect_mul_sse.asm
+ ${isal_src_dir}/erasure_code/gf_2vect_dot_prod_avx512.asm
+ ${isal_src_dir}/erasure_code/gf_2vect_mad_avx512.asm
+ ${isal_src_dir}/erasure_code/gf_3vect_dot_prod_avx512.asm
+ ${isal_src_dir}/erasure_code/gf_3vect_mad_avx512.asm
+ ${isal_src_dir}/erasure_code/gf_4vect_dot_prod_avx512.asm
+ ${isal_src_dir}/erasure_code/gf_4vect_mad_avx512.asm
+ ${isal_src_dir}/erasure_code/gf_vect_dot_prod_avx512.asm
+ ${isal_src_dir}/erasure_code/gf_vect_mad_avx512.asm
+ ErasureCodeIsa.cc
+ ErasureCodeIsaTableCache.cc
+ ErasureCodePluginIsa.cc
+ xor_op.cc
+ )
+elseif(HAVE_ARMV8_SIMD)
+ set(isa_srcs
+ ${isal_src_dir}/erasure_code/ec_base.c
+ ${isal_src_dir}/erasure_code/aarch64/ec_aarch64_highlevel_func.c
+ ${isal_src_dir}/erasure_code/aarch64/ec_aarch64_dispatcher.c
+ ${isal_src_dir}/erasure_code/aarch64/gf_2vect_dot_prod_neon.S
+ ${isal_src_dir}/erasure_code/aarch64/gf_2vect_mad_neon.S
+ ${isal_src_dir}/erasure_code/aarch64/gf_3vect_dot_prod_neon.S
+ ${isal_src_dir}/erasure_code/aarch64/gf_3vect_mad_neon.S
+ ${isal_src_dir}/erasure_code/aarch64/gf_4vect_dot_prod_neon.S
+ ${isal_src_dir}/erasure_code/aarch64/gf_4vect_mad_neon.S
+ ${isal_src_dir}/erasure_code/aarch64/gf_5vect_dot_prod_neon.S
+ ${isal_src_dir}/erasure_code/aarch64/gf_5vect_mad_neon.S
+ ${isal_src_dir}/erasure_code/aarch64/gf_6vect_mad_neon.S
+ ${isal_src_dir}/erasure_code/aarch64/gf_vect_dot_prod_neon.S
+ ${isal_src_dir}/erasure_code/aarch64/gf_vect_mad_neon.S
+ ${isal_src_dir}/erasure_code/aarch64/gf_vect_mul_neon.S
+ ${isal_src_dir}/erasure_code/aarch64/ec_multibinary_arm.S
+ ErasureCodeIsa.cc
+ ErasureCodeIsaTableCache.cc
+ ErasureCodePluginIsa.cc
+ xor_op.cc
+ )
+ set_source_files_properties(
+ ${isal_src_dir}/erasure_code/aarch64/ec_multibinary_arm.S
+ PROPERTIES COMPILE_FLAGS "-D__ASSEMBLY__"
+ )
+endif()
add_library(ec_isa SHARED
${isa_srcs}