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authorYangtao Li <frank@allwinnertech.com>2024-10-31 08:02:14 +0100
committerChen-Yu Tsai <wens@csie.org>2024-11-02 12:32:39 +0100
commit248b20ed03545656bd1775ed115369854f58f55c (patch)
treee7bd7be176c28c3ebad26c2df3f00df90a12977c
parentARM: dts: sunxi: add support for RerVision A33-Vstar board (diff)
downloadlinux-248b20ed03545656bd1775ed115369854f58f55c.tar.xz
linux-248b20ed03545656bd1775ed115369854f58f55c.zip
arm64: dts: allwinner: A100: Add PMU mode
Add the Performance Monitoring Unit (PMU) device tree node to the A100 .dtsi, which tells DT users which interrupts are triggered by PMU overflow events on each core. Signed-off-by: Yangtao Li <frank@allwinnertech.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Cody Eksal <masterr3c0rd@epochal.quest> Link: https://patch.msgid.link/20241031070232.1793078-2-masterr3c0rd@epochal.quest Signed-off-by: Chen-Yu Tsai <wens@csie.org>
-rw-r--r--arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi15
1 files changed, 12 insertions, 3 deletions
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi
index a3dccf193765..1eca7c220ede 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi
@@ -25,21 +25,21 @@
enable-method = "psci";
};
- cpu@1 {
+ cpu1: cpu@1 {
compatible = "arm,cortex-a53";
device_type = "cpu";
reg = <0x1>;
enable-method = "psci";
};
- cpu@2 {
+ cpu2: cpu@2 {
compatible = "arm,cortex-a53";
device_type = "cpu";
reg = <0x2>;
enable-method = "psci";
};
- cpu@3 {
+ cpu3: cpu@3 {
compatible = "arm,cortex-a53";
device_type = "cpu";
reg = <0x3>;
@@ -47,6 +47,15 @@
};
};
+ pmu {
+ compatible = "arm,cortex-a53-pmu";
+ interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
+ };
+
psci {
compatible = "arm,psci-1.0";
method = "smc";