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authorMarek Vasut <marex@denx.de>2021-01-14 15:52:10 +0100
committerAlexandre Torgue <alexandre.torgue@foss.st.com>2021-01-14 18:38:27 +0100
commit32d4878b26c1c69c893c6a1f6f7004d1bcc57a79 (patch)
tree43f77cc885eecc68157eb9d17f5296561104b276
parentARM: dts: stm32: Enable internal pull-ups for SDMMC1 on DHCOM SoM (diff)
downloadlinux-32d4878b26c1c69c893c6a1f6f7004d1bcc57a79.tar.xz
linux-32d4878b26c1c69c893c6a1f6f7004d1bcc57a79.zip
ARM: dts: stm32: Disable SDMMC1 CKIN feedback clock on DHCOM
The STM32MP1 DHCOM SoM can be built with either bus voltage level shifter or without one on the SDMMC1 interface. Because the SDMMC1 interface is limited to 50 MHz and hence SD high-speed anyway, disable the SD feedback clock to permit operation of the same U-Boot image on both SoM with and without voltage level shifter. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
-rw-r--r--arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi1
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi b/arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi
index 97c6e0cd582c..2a20818c91e4 100644
--- a/arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi
+++ b/arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi
@@ -394,7 +394,6 @@
disable-wp;
st,sig-dir;
st,neg-edge;
- st,use-ckin;
bus-width = <4>;
vmmc-supply = <&vdd_sd>;
status = "okay";