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| author | Tom St Denis <tom.stdenis@amd.com> | 2017-08-31 15:12:47 +0200 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2017-08-31 21:01:02 +0200 |
| commit | 54cfe0fc54a16de265aac79fb8c7c7cd3131c964 (patch) | |
| tree | 4dcaae7cf450676104648e77c068e3893274ba7e | |
| parent | drm/amd/amdgpu: Tidy up gfx_v9_0_enable_sck_slow_down_on_power_down() (diff) | |
| download | linux-54cfe0fc54a16de265aac79fb8c7c7cd3131c964.tar.xz linux-54cfe0fc54a16de265aac79fb8c7c7cd3131c964.zip | |
drm/amd/amdgpu: Tidy up gfx_v9_0_enable_cp_power_gating()
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 15 |
1 files changed, 5 insertions, 10 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c index 1f95ca8e476b..61b3362d3c20 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c @@ -1870,16 +1870,11 @@ static void gfx_v9_0_enable_cp_power_gating(struct amdgpu_device *adev, uint32_t default_data = 0; default_data = data = RREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_CNTL)); - - if (enable == true) { - data &= ~RLC_PG_CNTL__CP_PG_DISABLE_MASK; - if(default_data != data) - WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_CNTL), data); - } else { - data |= RLC_PG_CNTL__CP_PG_DISABLE_MASK; - if(default_data != data) - WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_CNTL), data); - } + data = REG_SET_FIELD(data, RLC_PG_CNTL, + CP_PG_DISABLE, + enable ? 0 : 1); + if(default_data != data) + WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_CNTL), data); } static void gfx_v9_0_enable_gfx_cg_power_gating(struct amdgpu_device *adev, |