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authorDiogo Ivo <diogo.ivo@siemens.com>2024-04-03 12:48:11 +0200
committerPaolo Abeni <pabeni@redhat.com>2024-04-09 09:47:28 +0200
commitdc073430db8d3f28460ea3ec1901e34bf7e8c0f2 (patch)
tree11d35d2b8b35d70bce3ea75a7aa57ae359e53d71 /Makefile
parentnet: phy: air_en8811h: fix some error codes (diff)
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dt-bindings: net: Add support for AM65x SR1.0 in ICSSG
Silicon Revision 1.0 of the AM65x came with a slightly different ICSSG support: Only 2 PRUs per slice are available and instead 2 additional DMA channels are used for management purposes. We have no restrictions on specified PRUs, but the DMA channels need to be adjusted. Co-developed-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Diogo Ivo <diogo.ivo@siemens.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: MD Danish Anwar <danishanwar@ti.com> Signed-off-by: Paolo Abeni <pabeni@redhat.com>
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