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authorAnson Huang <Anson.Huang@nxp.com>2020-02-17 12:13:38 +0100
committerShawn Guo <shawnguo@kernel.org>2020-02-18 10:43:25 +0100
commitfec9b63833296e414bad3c79ad7041984977c9e4 (patch)
tree35890f4bfd735dd1159379336d47248abb0ecf90 /arch/arm/boot/dts/imx6sx-sabreauto.dts
parentARM: dts: imx6sx-nitrogen6sx: Use new pin names with DCE/DTE for UART pins (diff)
downloadlinux-fec9b63833296e414bad3c79ad7041984977c9e4.tar.xz
linux-fec9b63833296e414bad3c79ad7041984977c9e4.zip
ARM: dts: imx6sx-sabreauto: Use new pin names with DCE/DTE for UART pins
Use new pin names containing DCE/DTE for UART RX/TX/RTS/CTS pins, this is to distinguish the DCE/DTE functions. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/imx6sx-sabreauto.dts')
-rw-r--r--arch/arm/boot/dts/imx6sx-sabreauto.dts4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/imx6sx-sabreauto.dts b/arch/arm/boot/dts/imx6sx-sabreauto.dts
index 315044ccd65f..825924448ab4 100644
--- a/arch/arm/boot/dts/imx6sx-sabreauto.dts
+++ b/arch/arm/boot/dts/imx6sx-sabreauto.dts
@@ -229,8 +229,8 @@
pinctrl_uart1: uart1grp {
fsl,pins = <
- MX6SX_PAD_GPIO1_IO04__UART1_TX 0x1b0b1
- MX6SX_PAD_GPIO1_IO05__UART1_RX 0x1b0b1
+ MX6SX_PAD_GPIO1_IO04__UART1_DCE_TX 0x1b0b1
+ MX6SX_PAD_GPIO1_IO05__UART1_DCE_RX 0x1b0b1
>;
};