diff options
| author | Matti Lehtimäki <matti.lehtimaki@gmail.com> | 2023-09-22 02:35:33 +0200 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2023-09-28 01:07:59 +0200 |
| commit | 02c58ac774a03ffefd3708f9c17ea4d911e0ade7 (patch) | |
| tree | f963f39fb1f69edbc98fbb22a23092af001f526a /arch/arm/boot/dts/qcom/qcom-msm8974.dtsi | |
| parent | ARM: qcom: msm8226: Add rpm-master-stats node (diff) | |
| download | linux-02c58ac774a03ffefd3708f9c17ea4d911e0ade7.tar.xz linux-02c58ac774a03ffefd3708f9c17ea4d911e0ade7.zip | |
ARM: qcom: msm8974: Add rpm-master-stats node
Add rpm-master-stats node for MSM8974 and the required RPM MSG RAM
slices for memory access.
Signed-off-by: Matti Lehtimäki <matti.lehtimaki@gmail.com>
Reviewed-by: Luca Weiss <luca@z3ntu.xyz>
Link: https://lore.kernel.org/r/20230922003533.107835-3-matti.lehtimaki@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/qcom/qcom-msm8974.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/qcom/qcom-msm8974.dtsi | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi index 706fef53767e..0bc2e66d15b1 100644 --- a/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi @@ -116,6 +116,18 @@ rpm: remoteproc { compatible = "qcom,msm8974-rpm-proc", "qcom,rpm-proc"; + master-stats { + compatible = "qcom,rpm-master-stats"; + qcom,rpm-msg-ram = <&apss_master_stats>, + <&mpss_master_stats>, + <&lpss_master_stats>, + <&pronto_master_stats>; + qcom,master-names = "APSS", + "MPSS", + "LPSS", + "PRONTO"; + }; + smd-edge { interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>; qcom,ipc = <&apcs 8 0>; @@ -1067,6 +1079,26 @@ rpm_msg_ram: sram@fc428000 { compatible = "qcom,rpm-msg-ram"; reg = <0xfc428000 0x4000>; + + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0xfc428000 0x4000>; + + apss_master_stats: sram@150 { + reg = <0x150 0x14>; + }; + + mpss_master_stats: sram@b50 { + reg = <0xb50 0x14>; + }; + + lpss_master_stats: sram@1550 { + reg = <0x1550 0x14>; + }; + + pronto_master_stats: sram@1f50 { + reg = <0x1f50 0x14>; + }; }; bimc: interconnect@fc380000 { |