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| author | Sean Nyekjaer <sean@geanix.com> | 2024-07-09 14:16:18 +0200 |
|---|---|---|
| committer | Alexandre Torgue <alexandre.torgue@foss.st.com> | 2024-09-05 11:31:55 +0200 |
| commit | 4a12b200a66c0fce782bc8cf46d0f33fc1245f03 (patch) | |
| tree | d980ea5c7a21eb3ff2947db516684afe27641c44 /arch/arm/boot/dts/st | |
| parent | ARM: dts: stm32: Add ethernet MAC nvmem cells to DH STM32MP13xx DHCOR DHSBC b... (diff) | |
| download | linux-4a12b200a66c0fce782bc8cf46d0f33fc1245f03.tar.xz linux-4a12b200a66c0fce782bc8cf46d0f33fc1245f03.zip | |
ARM: dts: stm32: Add missing gpio options for sdmmc2_d47_pins_d
This enables DDR50 mode for the eMMC on Octavo OSD32MP1-RED board.
Fixes: be78ab4f632c ("ARM: dts: stm32: add initial support for stm32mp157-odyssey board")
Signed-off-by: Sean Nyekjaer <sean@geanix.com>
Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Diffstat (limited to 'arch/arm/boot/dts/st')
| -rw-r--r-- | arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi b/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi index ae83e7b10232..70e132dc6147 100644 --- a/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi +++ b/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi @@ -2229,6 +2229,9 @@ <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */ <STM32_PINMUX('E', 5, AF9)>, /* SDMMC2_D6 */ <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */ + slew-rate = <1>; + drive-push-pull; + bias-pull-up; }; }; |