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| author | Fabio Estevam <festevam@gmail.com> | 2018-12-03 18:40:20 +0100 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2018-12-10 03:03:04 +0100 |
| commit | d7f3894f0e46802ea55af4b859b9606d3a6bb107 (patch) | |
| tree | 74295c4a44fca4cd0113495c4b0e8bc89e22854d /arch/arm/boot/dts/vf610m4.dtsi | |
| parent | ARM: dts: imx6ul: Correct mask for GIC PPI interrupts (diff) | |
| download | linux-d7f3894f0e46802ea55af4b859b9606d3a6bb107.tar.xz linux-d7f3894f0e46802ea55af4b859b9606d3a6bb107.zip | |
ARM: dts: imx7: Correct mask for GIC PPI interrupts
The GIC_CPU_MASK_SIMPLE() macro should take as its argument the actual
number of CPU cores the interrupt controller is wired to.
i.MX7S contains a single Cortex-A7, hence the second interrupt specifier
cell for Private Peripheral Interrupts should use "GIC_CPU_MASK_SIMPLE(1)".
Likewise, i.MX7D contains two Cortex-A7 cores, so it should use
"GIC_CPU_MASK_SIMPLE(2)" instead.
Tested on a imx7s-warp.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/vf610m4.dtsi')
0 files changed, 0 insertions, 0 deletions