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authorLinus Torvalds <torvalds@linux-foundation.org>2020-10-20 18:18:31 +0200
committerLinus Torvalds <torvalds@linux-foundation.org>2020-10-20 18:18:31 +0200
commit709ebe6dff50405ae83551578bc08c0f78b05158 (patch)
tree8d4343b429771129ad5820ccde63b2ba22bb116f /arch/arm/include/debug/tegra.S
parentMerge tag 'arc-5.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgu... (diff)
parentARM: add malloc size to decompressor kexec size structure (diff)
downloadlinux-709ebe6dff50405ae83551578bc08c0f78b05158.tar.xz
linux-709ebe6dff50405ae83551578bc08c0f78b05158.zip
Merge tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm
Pull ARM updates from Russell King: - handle inexact watchpoint addresses (Douglas Anderson) - decompressor serial debug cleanups (Linus Walleij) - update L2 cache prefetch bits (Guillaume Tucker) - add text offset and malloc size to the decompressor kexec data * tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm: ARM: add malloc size to decompressor kexec size structure ARM: add TEXT_OFFSET to decompressor kexec image structure ARM: 9007/1: l2c: fix prefetch bits init in L2X0_AUX_CTRL using DT values ARM: 9010/1: uncompress: Print the location of appended DTB ARM: 9009/1: uncompress: Enable debug in head.S ARM: 9008/1: uncompress: Drop excess whitespace print ARM: 9006/1: uncompress: Wait for ready and busy in debug prints ARM: 9005/1: debug: Select flow control for all debug UARTs ARM: 9004/1: debug: Split waituart to CTS and TXRDY ARM: 9003/1: uncompress: Delete unused debug macros ARM: 8997/2: hw_breakpoint: Handle inexact watchpoint addresses
Diffstat (limited to 'arch/arm/include/debug/tegra.S')
-rw-r--r--arch/arm/include/debug/tegra.S7
1 files changed, 4 insertions, 3 deletions
diff --git a/arch/arm/include/debug/tegra.S b/arch/arm/include/debug/tegra.S
index 2148d0f88591..98daa7f48314 100644
--- a/arch/arm/include/debug/tegra.S
+++ b/arch/arm/include/debug/tegra.S
@@ -178,15 +178,16 @@
1002:
.endm
- .macro waituart, rd, rx
-#ifdef FLOW_CONTROL
+ .macro waituartcts, rd, rx
cmp \rx, #0
beq 1002f
1001: ldrb \rd, [\rx, #UART_MSR << UART_SHIFT]
tst \rd, #UART_MSR_CTS
beq 1001b
1002:
-#endif
+ .endm
+
+ .macro waituarttxrdy,rd,rx
.endm
/*