diff options
| author | Arnd Bergmann <arnd@arndb.de> | 2019-09-02 17:47:55 +0200 |
|---|---|---|
| committer | Krzysztof Kozlowski <krzk@kernel.org> | 2020-08-20 21:00:15 +0200 |
| commit | 71b9114d2c13a648fbe6523dd859e611c316ad90 (patch) | |
| tree | c380a723099f776736779319be913f8c0900989e /arch/arm/mach-s3c/setup-spi-s3c64xx.c | |
| parent | ARM: s3c24xx: stop including mach/hardware.h from mach/io.h (diff) | |
| download | linux-71b9114d2c13a648fbe6523dd859e611c316ad90.tar.xz linux-71b9114d2c13a648fbe6523dd859e611c316ad90.zip | |
ARM: s3c: move into a common directory
s3c24xx and s3c64xx have a lot in common, but are split across three
separate directories, which makes the interaction of the header files
more complicated than necessary.
Move all three directories into a new mach-s3c, with a minimal
set of changes to each file.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
[krzk: Rebase, add s3c24xx and s3c64xx suffix to several files, add SPDX
headers to new files, remove plat-samsung from MAINTAINERS]
Co-developed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
https://lore.kernel.org/r/20200806182059.2431-39-krzk@kernel.org
Diffstat (limited to 'arch/arm/mach-s3c/setup-spi-s3c64xx.c')
| -rw-r--r-- | arch/arm/mach-s3c/setup-spi-s3c64xx.c | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/arch/arm/mach-s3c/setup-spi-s3c64xx.c b/arch/arm/mach-s3c/setup-spi-s3c64xx.c new file mode 100644 index 000000000000..03c9d296bb0f --- /dev/null +++ b/arch/arm/mach-s3c/setup-spi-s3c64xx.c @@ -0,0 +1,27 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// Copyright (C) 2011 Samsung Electronics Ltd. +// http://www.samsung.com/ + +#include <linux/gpio.h> +#include <linux/platform_data/spi-s3c64xx.h> +#include <plat/gpio-cfg.h> +#include <mach/gpio-samsung.h> + +#ifdef CONFIG_S3C64XX_DEV_SPI0 +int s3c64xx_spi0_cfg_gpio(void) +{ + s3c_gpio_cfgall_range(S3C64XX_GPC(0), 3, + S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); + return 0; +} +#endif + +#ifdef CONFIG_S3C64XX_DEV_SPI1 +int s3c64xx_spi1_cfg_gpio(void) +{ + s3c_gpio_cfgall_range(S3C64XX_GPC(4), 3, + S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); + return 0; +} +#endif |