summaryrefslogtreecommitdiffstats
path: root/arch/arm64/boot/dts/nvidia/tegra194.dtsi
diff options
context:
space:
mode:
authorMikko Perttunen <mperttunen@nvidia.com>2018-06-20 14:54:06 +0200
committerThierry Reding <treding@nvidia.com>2018-07-02 15:56:07 +0200
commitf89b58ce71a949ca3592728b586d2077b6cc7ecc (patch)
tree5db6c72f731987c72cd6c5462bf8d3cf9fdf981b /arch/arm64/boot/dts/nvidia/tegra194.dtsi
parentarm64: tegra: Enable card detect for SD card on P2888 (diff)
downloadlinux-f89b58ce71a949ca3592728b586d2077b6cc7ecc.tar.xz
linux-f89b58ce71a949ca3592728b586d2077b6cc7ecc.zip
arm64: tegra: Add ethernet controller on Tegra194
The Tegra194 contains the same ethernet controller as the Tegra186. Add the device tree node for it, and correspondingly the PHY node on the board device tree. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm64/boot/dts/nvidia/tegra194.dtsi')
-rw-r--r--arch/arm64/boot/dts/nvidia/tegra194.dtsi22
1 files changed, 22 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
index 20c30782049e..2259a2b78afc 100644
--- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
@@ -35,6 +35,28 @@
gpio-controller;
};
+ ethernet@2490000 {
+ compatible = "nvidia,tegra186-eqos",
+ "snps,dwc-qos-ethernet-4.10";
+ reg = <0x02490000 0x10000>;
+ interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&bpmp TEGRA194_CLK_AXI_CBB>,
+ <&bpmp TEGRA194_CLK_EQOS_AXI>,
+ <&bpmp TEGRA194_CLK_EQOS_RX>,
+ <&bpmp TEGRA194_CLK_EQOS_TX>,
+ <&bpmp TEGRA194_CLK_EQOS_PTP_REF>;
+ clock-names = "master_bus", "slave_bus", "rx", "tx", "ptp_ref";
+ resets = <&bpmp TEGRA194_RESET_EQOS>;
+ reset-names = "eqos";
+ status = "disabled";
+
+ snps,write-requests = <1>;
+ snps,read-requests = <3>;
+ snps,burst-map = <0x7>;
+ snps,txpbl = <16>;
+ snps,rxpbl = <8>;
+ };
+
uarta: serial@3100000 {
compatible = "nvidia,tegra194-uart", "nvidia,tegra20-uart";
reg = <0x03100000 0x40>;