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author | Robin Murphy <robin.murphy@arm.com> | 2017-07-25 12:55:40 +0200 |
---|---|---|
committer | Catalin Marinas <catalin.marinas@arm.com> | 2017-08-09 12:00:35 +0200 |
commit | 7aac405ebb3224037efd56b73d82d181111cdac3 (patch) | |
tree | 04820d65325b5e9cfce27e0df511edd8c71a499c /arch/arm64/include/asm/sysreg.h | |
parent | arm64: Convert __inval_cache_range() to area-based (diff) | |
download | linux-7aac405ebb3224037efd56b73d82d181111cdac3.tar.xz linux-7aac405ebb3224037efd56b73d82d181111cdac3.zip |
arm64: Expose DC CVAP to userspace
The ARMv8.2-DCPoP feature introduces persistent memory support to the
architecture, by defining a point of persistence in the memory
hierarchy, and a corresponding cache maintenance operation, DC CVAP.
Expose the support via HWCAP and MRS emulation.
Reviewed-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64/include/asm/sysreg.h')
-rw-r--r-- | arch/arm64/include/asm/sysreg.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h index 248339e4aaf5..f707fed5886f 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -329,6 +329,7 @@ #define ID_AA64ISAR1_LRCPC_SHIFT 20 #define ID_AA64ISAR1_FCMA_SHIFT 16 #define ID_AA64ISAR1_JSCVT_SHIFT 12 +#define ID_AA64ISAR1_DPB_SHIFT 0 /* id_aa64pfr0 */ #define ID_AA64PFR0_GIC_SHIFT 24 |