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author | Michael Ellerman <mpe@ellerman.id.au> | 2018-11-06 09:25:38 +0100 |
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committer | Michael Ellerman <mpe@ellerman.id.au> | 2018-11-06 09:32:22 +0100 |
commit | 9586d569a369dc585a3e191dcabd72748e3c9c5c (patch) | |
tree | 7c31645463b75c5b18c9e6ac0990a02edd51c364 /arch/powerpc | |
parent | powerpc/mm/64s: Use PPC_SLBFEE macro (diff) | |
download | linux-9586d569a369dc585a3e191dcabd72748e3c9c5c.tar.xz linux-9586d569a369dc585a3e191dcabd72748e3c9c5c.zip |
powerpc/mm/64s: Only use slbfee on CPUs that support it
The slbfee instruction was only added in ISA 2.05 (Power6), it's not
supported on older CPUs. We don't have a CPU feature for that ISA
version though, so just use the ISA 2.06 feature flag.
Fixes: e15a4fea4dee ("powerpc/64s/hash: Add some SLB debugging tests")
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc')
-rw-r--r-- | arch/powerpc/mm/slb.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/powerpc/mm/slb.c b/arch/powerpc/mm/slb.c index 457fd29448b1..b663a36f9ada 100644 --- a/arch/powerpc/mm/slb.c +++ b/arch/powerpc/mm/slb.c @@ -66,6 +66,9 @@ static void assert_slb_presence(bool present, unsigned long ea) WARN_ON_ONCE(mfmsr() & MSR_EE); + if (!cpu_has_feature(CPU_FTR_ARCH_206)) + return; + asm volatile(__PPC_SLBFEE_DOT(%0, %1) : "=r"(tmp) : "r"(ea) : "cr0"); WARN_ON(present == (tmp == 0)); |