diff options
| author | Abel Vesa <abel.vesa@linaro.org> | 2024-06-04 17:20:24 +0200 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2024-06-06 05:03:16 +0200 |
| commit | 8e99e770f7eab8f8127098df7824373c4b4e8b5c (patch) | |
| tree | d1dcbbadbfbb69d1e591b0c2b46383c5e42c84b2 /arch | |
| parent | arm64: dts: qcom: sa8775p: Correct IRQ number of EL2 non-secure physical timer (diff) | |
| download | linux-8e99e770f7eab8f8127098df7824373c4b4e8b5c.tar.xz linux-8e99e770f7eab8f8127098df7824373c4b4e8b5c.zip | |
arm64: dts: qcom: x1e80100: Fix PCIe 6a reg offsets and add MHI
The actual size of the DBI region is 0xf20 and the start of the
ELBI region is 0xf40, according to the documentation. So fix them.
While at it, add the MHI region as well.
Fixes: 5eb83fc10289 ("arm64: dts: qcom: x1e80100: Add PCIe nodes")
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20240604-x1e80100-dts-fixes-pcie6a-v2-1-0b4d8c6256e5@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm64/boot/dts/qcom/x1e80100.dtsi | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi index 5f90a0b3c016..05e4d491ec18 100644 --- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi +++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi @@ -2737,15 +2737,17 @@ device_type = "pci"; compatible = "qcom,pcie-x1e80100"; reg = <0 0x01bf8000 0 0x3000>, - <0 0x70000000 0 0xf1d>, - <0 0x70000f20 0 0xa8>, + <0 0x70000000 0 0xf20>, + <0 0x70000f40 0 0xa8>, <0 0x70001000 0 0x1000>, - <0 0x70100000 0 0x100000>; + <0 0x70100000 0 0x100000>, + <0 0x01bfb000 0 0x1000>; reg-names = "parf", "dbi", "elbi", "atu", - "config"; + "config", + "mhi"; #address-cells = <3>; #size-cells = <2>; ranges = <0x01000000 0 0x00000000 0 0x70200000 0 0x100000>, |