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| author | Roger Quadros <rogerq@kernel.org> | 2024-11-14 14:36:53 +0100 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2024-11-18 13:00:21 +0100 |
| commit | a208f417582ffc9e73d2e27a41d1d5c67528be5f (patch) | |
| tree | 81f2bbee14405b2eec1938008bfecaaa35c4b85c /crypto/aegis128-neon.c | |
| parent | net: ethernet: ti: am65-cpsw: update pri_thread_map as per IEEE802.1Q-2014 (diff) | |
| download | linux-a208f417582ffc9e73d2e27a41d1d5c67528be5f.tar.xz linux-a208f417582ffc9e73d2e27a41d1d5c67528be5f.zip | |
net: ethernet: ti: am65-cpsw: enable DSCP to priority map for RX
AM65 CPSW hardware can map the 6-bit DSCP/TOS field to
appropriate priority queue via DSCP to Priority mapping registers
(CPSW_PN_RX_PRI_MAP_REG).
Use a default DSCP to User Priority (UP) mapping as per
https://datatracker.ietf.org/doc/html/rfc8325#section-4.3
and
https://datatracker.ietf.org/doc/html/rfc8622#section-11
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Guillaume Nault <gnault@redhat.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'crypto/aegis128-neon.c')
0 files changed, 0 insertions, 0 deletions